[PATCH] D41794: [X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

This looks like there is a lot of crossover with lowerVectorShuffleByMerging128BitLanes?



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10761
+  int Size = Mask.size();
+  SmallVector<int, 8> RepeatMask(Size, -1);
+
----------------
Should't RepeatMask be just LaneSize wide? 


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:10791
+    PermuteMask[i] = M;
+    if (PermuteMask[i] < 0)
+      continue;
----------------
Do we gain anything by relaxing this and keeping PermuteMask[i] as UNDEF if the original Mask[i] was UNDEF?


Repository:
  rL LLVM

https://reviews.llvm.org/D41794