[PATCH] D41855: [ARM] Fix erroneous availability of SMMLS for Armv7-M
Andre Vieira via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 9 07:30:43 PST 2018
avieira updated this revision to Diff 129084.
https://reviews.llvm.org/D41855
Files:
lib/Target/ARM/ARM.td
lib/Target/ARM/ARMISelDAGToDAG.cpp
test/CodeGen/ARM/smml.ll
Index: test/CodeGen/ARM/smml.ll
===================================================================
--- test/CodeGen/ARM/smml.ll
+++ test/CodeGen/ARM/smml.ll
@@ -5,6 +5,8 @@
; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6
; RUN: llc -mtriple=thumbv6t2-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6T2
; RUN: llc -mtriple=thumbv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6T2
+; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V4
+; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V6T2
define i32 @Test0(i32 %a, i32 %b, i32 %c) nounwind readnone ssp {
entry:
Index: lib/Target/ARM/ARMISelDAGToDAG.cpp
===================================================================
--- lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -2765,7 +2765,7 @@
}
}
case ARMISD::SUBE: {
- if (!Subtarget->hasV6Ops())
+ if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())
break;
// Look for a pattern to match SMMLS
// (sube a, (smul_loHi a, b), (subc 0, (smul_LOhi(a, b))))
Index: lib/Target/ARM/ARM.td
===================================================================
--- lib/Target/ARM/ARM.td
+++ lib/Target/ARM/ARM.td
@@ -507,7 +507,8 @@
def ARMv5tej : Architecture<"armv5tej", "ARMv5tej", [HasV5TEOps]>;
-def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops]>;
+def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops,
+ FeatureDSP]>;
def ARMv6t2 : Architecture<"armv6t2", "ARMv6t2", [HasV6T2Ops,
FeatureDSP]>;
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