[PATCH] D41430: [ARM] Armv8-R DFB instruction

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

This is the only new instruction added in Armv8-r, right? I assume this is the reason you added a very specific target feature for it (rather than something like armv8-r)? I think this also the reason you had to add 4 separate tiny test files? This is slightly unfortunate, but matches with the way things are done currently.



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Comment at: lib/Target/ARM/ARMInstrInfo.td:4813
+                "dfb", "", []>,
+                Requires<[IsARM, HasDFB]> , Sched<[WriteALU]> {
+                let Inst{31-0} = 0xf57ff04c;
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samparker wrote:
> fhahn wrote:
> > Are you sure about `Sched<[WriteALU]>`? It's an alias to the `DSB` instruction , which does not have a similar `Sched`
> I'm not, but couldn't find where/how DSB got its scheduling info. Do you know where its defined? I should probably also add an InstAlias to DSB...
The instruction is marked as having (unmodelled) side effects. That should tell the scheduler to not move instructions past this instruction, so I think there is no need to add scheduling info.


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Comment at: test/MC/Disassembler/ARM/dfb-arm.txt:1
+# SDCOMP-27699: DFB on ARMv8-R
+# RUN: llvm-mc -disassemble -triple armv8-none-eabi -mcpu=cortex-r52 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DFB
----------------
Please remove SDCOMP-27699.


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Comment at: test/MC/Disassembler/ARM/dfb-thumb.txt:1
+# SDCOMP-27699: DFB on ARMv8-R
+# RUN: llvm-mc -disassemble -triple thumbv8-none-eabi -mcpu=cortex-r52 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DFB
----------------
Please remove SDCOMP-27699.


https://reviews.llvm.org/D41430