[PATCH] D41226: LiveDebugValues spill recognition expasnsion

Nikola Prica via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 19 11:15:40 PST 2017


NikolaPrica added inline comments.


================
Comment at: lib/CodeGen/LiveDebugValues.cpp:451
+            if (RegNext == Reg) {
+              Reg = RegNext;
+              break;
----------------
aprantl wrote:
> aprantl wrote:
> > Isn't that a no-op?
> The test still passes when I comment out line 449-450. Could you add coverage for these two lines, too?
I'm not sure what are you asking. Do you think I should add test coverage for this particular condition on 449. If you do, only what I could think of is changing MIR test example in order to hit condition on line 449. It would go something like this then:
   
    %r12d = MOV32rr %r15d
    MOV32mr %rbp, 1, %noreg, -48, %noreg, renamable %r15d :: (store 4 into %stack.0)
    %edi = MOV32rr killed %r12d

Then this wouldn't be recognized as spill instruction but it could be mentioned in test that this is changed in testing purpose.

 Or you are thinking of dispatching condition on 449? I've tried to describe particular situation from MIR with conditions from lines 449 and 448. But this situation could be described as spill instruction after which we expect that copy operation is done and that spill register is killed in the next instruction. Said like that then we don't need condition from line 449.


https://reviews.llvm.org/D41226





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