[PATCH] D41117: AMDGPU: Partially fix disassembly of MIMG instructions

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp accepted this revision.
dp added a comment.
This revision is now accepted and ready to land.

Looks good.

There are a couple of differences with sp3 which we should probably address in the future:

- sp3 always prints vaddr as having 4 components. This is not correct either, but should we mimic sp3 for compatibility?
- sp3 accounts for tfe when computing dst size. Our implementation accepts tfe but actually ignores it.

I'm gonna take a look at mimg issues next week.


https://reviews.llvm.org/D41117