[PATCH] D39193: [ARM] Don't omit non-default predication code

[Renato Golin via Phabricator via llvm-commits]

rengolin added inline comments.


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Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:5810
                                               OperandVector &Operands) {
   // VRINT{Z, R, X} have a predicate operand in VFP, but not in NEON
   unsigned RegIdx = 3;
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update comment?


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Comment at: test/MC/ARM/invalid-neon-v8.s:76
+
+// These instructions are predicable in VFP but not in NEON
+vrintzeq.f32 d0, d1
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do we have tests for when it's valid? for all three R,X,Z variants?


Repository:
  rL LLVM

https://reviews.llvm.org/D39193