[PATCH] D39712: [ARM] Add an alias for psr and psr_nzcvq

[Leslie Zhai via Phabricator via llvm-commits]

xiangzhai updated this revision to Diff 122571.
xiangzhai added a comment.

Provided a diagnostic indicating that "xpsr" should be used instead of "psr":

  $ llvm/build/bin/llvm-mc -triple=thumbv7m test/MC/ARM/thumb2-mclass.s                
          .text
  
  
  
  
          mrs     r0, apsr
          mrs     r0, iapsr
          mrs     r0, eapsr
          mrs     r0, xpsr
          mrs     r0, ipsr
          mrs     r0, epsr
          mrs     r0, iepsr
          mrs     r0, msp
          mrs     r0, psp
          mrs     r0, primask
  test/MC/ARM/thumb2-mclass.s:24:9: warning: xpsr should be used instead of psr
          mrs  ip, psr
          ^
          mrs     r0, control
          mrs     r12, xpsr
  
  
  
          msr     apsr_nzcvq, r0
          msr     apsr_nzcvq, r0
          msr     iapsr_nzcvq, r0
          msr     iapsr_nzcvq, r0
          msr     eapsr_nzcvq, r0
          msr     eapsr_nzcvq, r0
          msr     xpsr_nzcvq, r0
          msr     xpsr_nzcvq, r0
          msr     ipsr, r0
          msr     epsr, r0
          msr     iepsr, r0
          msr     msp, r0
          msr     psp, r0
          msr     primask, r0
  test/MC/ARM/thumb2-mclass.s:58:9: warning: xpsr should be used instead of psr
          msr  psr_nzcvq, ip
          ^
          msr     control, r0
          msr     xpsr_nzcvq, r12

I am not familiar with the History https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=62b3e31101ef2dfb96ee4652d5145e722b335e31


Repository:
  rL LLVM

https://reviews.llvm.org/D39712

Files:
  lib/Target/ARM/ARMSystemRegister.td
  lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  test/MC/ARM/thumb2-mclass.s


Index: test/MC/ARM/thumb2-mclass.s
===================================================================
--- test/MC/ARM/thumb2-mclass.s
+++ test/MC/ARM/thumb2-mclass.s
@@ -21,6 +21,7 @@
         mrs  r0, psp
         mrs  r0, primask
         mrs  r0, control
+        mrs  ip, psr
 
 @ CHECK: mrs	r0, apsr                @ encoding: [0xef,0xf3,0x00,0x80]
 @ CHECK: mrs	r0, iapsr               @ encoding: [0xef,0xf3,0x01,0x80]
@@ -33,6 +34,7 @@
 @ CHECK: mrs	r0, psp                 @ encoding: [0xef,0xf3,0x09,0x80]
 @ CHECK: mrs	r0, primask             @ encoding: [0xef,0xf3,0x10,0x80]
 @ CHECK: mrs	r0, control             @ encoding: [0xef,0xf3,0x14,0x80]
+@ CHECK: mrs    r12, xpsr               @ encoding: [0xef,0xf3,0x03,0x8c]
 
 @------------------------------------------------------------------------------
 @ MSR
@@ -53,6 +55,7 @@
         msr  psp, r0
         msr  primask, r0
         msr  control, r0
+        msr  psr_nzcvq, ip
 
 @ CHECK-V6M: msr	apsr, r0                @ encoding: [0x80,0xf3,0x00,0x88]
 @ CHECK-V6M: msr	apsr, r0                @ encoding: [0x80,0xf3,0x00,0x88]
@@ -77,3 +80,4 @@
 @ CHECK: msr	psp, r0                 @ encoding: [0x80,0xf3,0x09,0x88]
 @ CHECK: msr	primask, r0             @ encoding: [0x80,0xf3,0x10,0x88]
 @ CHECK: msr	control, r0             @ encoding: [0x80,0xf3,0x14,0x88]
+@ CHECK: msr    xpsr_nzcvq, r12         @ encoding: [0x8c,0xf3,0x03,0x88]
Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -167,6 +167,7 @@
 class ARMAsmParser : public MCTargetAsmParser {
   const MCRegisterInfo *MRI;
   UnwindContext UC;
+  const StringRef PSR_NAME = "psr";
 
   ARMTargetStreamer &getTargetStreamer() {
     assert(getParser().getStreamer().getTargetStreamer() &&
@@ -9051,6 +9052,18 @@
   MCInst Inst;
   unsigned MatchResult;
   bool PendConditionalInstruction = false;
+  MCAsmParser &Parser = getParser();
+  AsmToken Tokens[3];
+  size_t ReadCount = Parser.getLexer().peekTokens(Tokens);
+  if (ReadCount == 3 && Parser.getTok().getKind() == AsmToken::Identifier &&
+      (Tokens[0].getKind() == AsmToken::Identifier ||
+       Tokens[2].getKind() == AsmToken::Identifier)) {
+    if (Tokens[0].getIdentifier().startswith_lower(PSR_NAME) ||
+        Tokens[2].getIdentifier().startswith_lower(PSR_NAME)) {
+      Warning(Parser.getTok().getLoc(),
+              "xpsr should be used instead of " + PSR_NAME);
+    }
+  }
 
   SmallVector<NearMissInfo, 4> NearMisses;
   MatchResult = MatchInstruction(Operands, Inst, NearMisses, MatchingInlineAsm,
Index: lib/Target/ARM/ARMSystemRegister.td
===================================================================
--- lib/Target/ARM/ARMSystemRegister.td
+++ lib/Target/ARM/ARMSystemRegister.td
@@ -63,6 +63,8 @@
 def : MClassSysReg<1,    1,    0,    0x802, "eapsr_nzcvq">;
 def : MClassSysReg<0,    0,    1,    0x803, "xpsr">;
 def : MClassSysReg<1,    1,    0,    0x803, "xpsr_nzcvq">;
+def : MClassSysReg<1,    0,    1,    0x803, "psr">;
+def : MClassSysReg<1,    1,    1,    0x803, "psr_nzcvq">;
 
 def : MClassSysReg<0,    0,    1,    0x805, "ipsr">;
 def : MClassSysReg<0,    0,    1,    0x806, "epsr">;


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