[PATCH] D19325: DAGCombine: (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 14 03:39:56 PDT 2017


This revision was automatically updated to reflect the committed changes.
Closed by commit rL313251: [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) (authored by RKSimon).

Changed prior to commit:
  https://reviews.llvm.org/D19325?vs=113858&id=115195#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D19325

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
  llvm/trunk/test/CodeGen/AMDGPU/shl.ll
  llvm/trunk/test/CodeGen/X86/combine-shl.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D19325.115195.patch
Type: text/x-patch
Size: 7573 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170914/cd862837/attachment.bin>


More information about the llvm-commits mailing list