[PATCH] D32991: [ELF] Initial migration of AVR target

[Leslie Zhai via Phabricator via llvm-commits]

xiangzhai added a comment.

Dear Dylan,

Thanks for your kind response!

>> so I need to read about GNU binutils' objdump to find out how GCC disassemble AVR, thoughts?
> 
> I wouldn't say that. Most of our instructions can be disassembled already, even though the disassembler is bare boned. During compilation, LLVM run's the TableGen command on the `AVRInstrInfo.td` file to generate disassembly tables for all instructions that it can. Because of this, the disassembler can already disassemble a number of programs..

Could you please kindly show me the testcase for proving `AVRInstrInfo.td` is correct? git log commit info, thanks!

> The issue arises when there are ambiguities or custom encodings. A good example is the `ldd` instruction. There is an opcode bit which is set depending on which registers are given as operands. We have a custom hook (in `AVRMCCodeEmitter.cpp`) to set that bit depending manually. Because of this, disassembly for this instruction will not always work because there is no custom code to handle this in the disassembler yet and it obviously cannot disassemble just looking at the tables.

Yes, there are more real Encode functions <https://github.com/llvm-mirror/llvm/blob/master/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp#L39> in the `AVRMCCodeEmitter`, the same story, testcase please.

> From my understanding, Davide wants you to modify the disassembler so that two specific instructions have custom code for disassembly. I am not entirely sure what that would look like because it has been a long time since I've looked at disassembly.

OK, I need to learn about disassembly :)

Let's compare with GNU cross compiler toolchain for AVR target:

  $ cat basic-avr.s
  
  main:
    call foo
  
  foo:
    jmp foo

Then build with avr-gcc

  $ avr-gcc -o avr-gcc-basic-avr.o -c -mmcu=atmega328p basic-avr.s
  
  $ file avr-gcc-basic-avr.o 
  avr-gcc-basic-avr.o: ELF 32-bit LSB relocatable, Atmel AVR 8-bit, version 1 (SYSV), not stripped
  
  $ readelf -r avr-gcc-basic-avr.o 
  
  Relocation section '.rela.text' at offset 0xa8 contains 2 entries:
   Offset     Info    Type            Sym.Value  Sym. Name + Addend
  00000000  00000112 R_AVR_CALL        00000000   .text + 4
  00000004  00000112 R_AVR_CALL        00000000   .text + 4

And avr-objdump

  $ avr-objdump -d avr-gcc-basic-avr.o 
  
  avr-gcc-basic-avr.o:     file format elf32-avr
  
  
  Disassembly of section .text:
  
  00000000 <main>:
     0:   0e 94 00 00     call    0       ; 0x0 <main>
  
  00000004 <foo>:
     4:   0c 94 00 00     jmp     0       ; 0x0 <main>

and LLVM's llvm-mc, ld.lld, and llvm-objdump shown above <https://reviews.llvm.org/D32991#776611> .

Regards,
Leslie Zhai


Repository:
  rL LLVM

https://reviews.llvm.org/D32991