[PATCH] D32991: [ELF] Initial migration of AVR target

[Dylan McKay via Phabricator via llvm-commits]

dylanmckay added a comment.

> AVR disassembler is bare-bones?

Yes, very. I had essentially just copied the Mips disassembler and then removed all of the Mips-specific stuff.

> so I need to read about GNU binutils' objdump to find out how GCC disassemble AVR, thoughts?

I wouldn't say that. Most of our instructions can be disassembled already, even though the disassembler is bare boned. During compilation, LLVM run's the TableGen command on the `AVRInstrInfo.td` file to generate disassembly tables for all instructions that it can. Because of this, the disassembler can already disassemble a number of programs..

The issue arises when there are ambiguities or custom encodings. A good example is the `ldd` instruction. There is an opcode bit which is set depending on which registers are given as operands. We have a custom hook (in `AVRMCCodeEmitter.cpp`) to set that bit depending manually. Because of this, disassembly for this instruction will not always work because there is no custom code to handle this in the disassembler yet and it obviously cannot disassemble just looking at the tables.

>From my understanding, Davide wants you to modify the disassembler so that two specific instructions have custom code for disassembly. I am not entirely sure what that would look like because it has been a long time since I've looked at disassembly.


Repository:
  rL LLVM

https://reviews.llvm.org/D32991