[PATCH] D31211: [AMDGPU] Add target triple environment amdnas and amdnascl

Yaxun Liu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 22 11:53:11 PDT 2017


yaxunl updated this revision to Diff 92672.
yaxunl retitled this revision from "[AMDGPU] Add target feature new-addr" to "[AMDGPU] Add target triple environment amdnas and amdnascl".
yaxunl edited the summary of this revision.
yaxunl added a comment.
Herald added a subscriber: Anastasia.

Use triple environment to indicate new address space mapping used.


https://reviews.llvm.org/D31211

Files:
  include/llvm/ADT/Triple.h
  lib/Support/Triple.cpp
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  test/CodeGen/AMDGPU/env-amdnas.ll
  test/CodeGen/AMDGPU/env-amdnascl.ll


Index: test/CodeGen/AMDGPU/env-amdnascl.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/env-amdnascl.ll
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdnascl -verify-machineinstrs < %s
+; Just check the target feature and data layout is accepted without error.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "amdgcn-amd-amdhsa-amdnascl"
+
+define void @foo() {
+entry:
+  ret void
+}
+
Index: test/CodeGen/AMDGPU/env-amdnas.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/env-amdnas.ll
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mtriple=amdgcn-amd-amdhsa-amdnas -verify-machineinstrs < %s
+; Just check the target feature and data layout is accepted without error.
+
+target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "amdgcn-amd-amdhsa-amdnas"
+
+define void @foo() {
+entry:
+  ret void
+}
+
Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -177,9 +177,14 @@
 
   // 32-bit private, local, and region pointers. 64-bit global, constant and
   // flat.
-  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+  if (TT.getEnvironment() == Triple::AMDNAS ||
+      TT.getEnvironment() == Triple::AMDNASCL)
+    return "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
          "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
+  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+      "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
+      "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
 }
 
 LLVM_READNONE
Index: lib/Support/Triple.cpp
===================================================================
--- lib/Support/Triple.cpp
+++ lib/Support/Triple.cpp
@@ -224,6 +224,8 @@
   case Itanium: return "itanium";
   case Cygnus: return "cygnus";
   case AMDOpenCL: return "amdopencl";
+  case AMDNAS: return "amdnas";
+  case AMDNASCL: return "amdnascl";
   case CoreCLR: return "coreclr";
   case OpenCL: return "opencl";
   }
@@ -500,6 +502,8 @@
     .StartsWith("itanium", Triple::Itanium)
     .StartsWith("cygnus", Triple::Cygnus)
     .StartsWith("amdopencl", Triple::AMDOpenCL)
+    .StartsWith("amdnas", Triple::AMDNAS)
+    .StartsWith("amdnascl", Triple::AMDNASCL)
     .StartsWith("coreclr", Triple::CoreCLR)
     .StartsWith("opencl", Triple::OpenCL)
     .Default(Triple::UnknownEnvironment);
Index: include/llvm/ADT/Triple.h
===================================================================
--- include/llvm/ADT/Triple.h
+++ include/llvm/ADT/Triple.h
@@ -199,7 +199,9 @@
     AMDOpenCL,
     CoreCLR,
     OpenCL,
-    LastEnvironmentType = OpenCL
+    AMDNAS,
+    AMDNASCL,
+    LastEnvironmentType = AMDNASCL,
   };
   enum ObjectFormatType {
     UnknownObjectFormat,


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