[PATCH] D30081: [PPC] Eliminate more compare instructions using record-form operation

Hiroshi Inoue via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 24 01:41:36 PST 2017


inouehrs added inline comments.


================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:1597
           MIOpC == PPC::SRW    || MIOpC == PPC::SRWo ||
+          MIOpC == PPC::ANDIo  || MIOpC == PPC::ANDISo ||
+          MIOpC == PPC::ROTRWI || MIOpC == PPC::ROTRWIo ||
----------------
nemanjai wrote:
> I didn't really go through this function to really understand the purpose for this check, but presumably all these additional instruction opcodes are used for something. If the opcodes you're adding are used for something there should be associated test cases for all of the additional ones. If they're not used at all, then they shouldn't be added. For example, if they're just being added here and something additional needs to be done to exploit them, we should not add them but rather put in a `FIXME` to add them once we can also add the necessary support.
I eliminated instructions other than andi. Maybe I can add test cases, but anyway, I have never observed actual occurrences of these sequences. So, I disabled them for safety.



https://reviews.llvm.org/D30081





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