[PATCH] D29835: Correct register pressure calculation in presence of subregs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: lib/CodeGen/RegisterPressure.cpp:43
+/// Clamp lane masks to maximum posible value.
+static void clampMasks(const MachineRegisterInfo &MRI, unsigned Reg,
+                       LaneBitmask& LaneMask1, LaneBitmask& LaneMask2) {
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alex-t wrote:
> Given that getMaxLaneMaskForVReg returns all bit s that possibly can be set in the n=mask for given register class,  what is the purpose of the AND? Unless you expect the bits not present in the register class to be set in LaneMask for the reg unit of this class.
In certain situations I just see -1 passed as a lane mask, mostly with Hexagon. In fact I can also see quite a few places where lane mask is initialized with default argument = LaneBitmask::getAll(), so until it is properly tracked at all places we need to take extra care. Without this I see a lot of assertions about pressure underflow from many lit tests.


Repository:
  rL LLVM

https://reviews.llvm.org/D29835