[llvm] r294524 - [InstCombine] add tests to show information-losing add nsw/nuw transforms; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed Feb  8 16:14:11 2017
New Revision: 294524

URL: http://llvm.org/viewvc/llvm-project?rev=294524&view=rev
Log:
[InstCombine] add tests to show information-losing add nsw/nuw transforms; NFC

Modified:
    llvm/trunk/test/Transforms/InstCombine/add.ll
    llvm/trunk/test/Transforms/InstCombine/icmp-add.ll
    llvm/trunk/test/Transforms/InstCombine/sub-xor.ll

Modified: llvm/trunk/test/Transforms/InstCombine/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add.ll?rev=294524&r1=294523&r2=294524&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/add.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/add.ll Wed Feb  8 16:14:11 2017
@@ -244,14 +244,49 @@ define i32 @test19(i1 %C) {
   ret i32 %V
 }
 
+; Add of sign bit -> xor of sign bit.
+
 define i32 @test20(i32 %x) {
 ; CHECK-LABEL: @test20(
 ; CHECK-NEXT:    ret i32 %x
 ;
-  %tmp.2 = xor i32 %x, -2147483648
-  ;; Add of sign bit -> xor of sign bit.
-  %tmp.4 = add i32 %tmp.2, -2147483648
-  ret i32 %tmp.4
+  %y = xor i32 %x, -2147483648
+  %z = add nsw i32 %y, -2147483648
+  ret i32 %z
+}
+
+define i32 @xor_sign_bit(i32 %x) {
+; CHECK-LABEL: @xor_sign_bit(
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 %x, -2147483606
+; CHECK-NEXT:    ret i32 [[ADD]]
+;
+  %xor = xor i32 %x, 2147483648
+  %add = add i32 %xor, 42
+  ret i32 %add
+}
+
+; Lose no-wrap info by converting to xor? %x is known non-negative
+; here, but not after converting to xor.
+
+define i8 @add_nsw_signbit(i8 %x) {
+; CHECK-LABEL: @add_nsw_signbit(
+; CHECK-NEXT:    [[Y:%.*]] = xor i8 %x, -128
+; CHECK-NEXT:    ret i8 [[Y]]
+;
+  %y = add nsw i8 %x, -128
+  ret i8 %y
+}
+
+; Lose no-wrap info by converting to xor? %x is known non-negative
+; (x < 128 unsigned), but not after converting to xor.
+
+define i8 @add_nuw_signbit(i8 %x) {
+; CHECK-LABEL: @add_nuw_signbit(
+; CHECK-NEXT:    [[Y:%.*]] = xor i8 %x, -128
+; CHECK-NEXT:    ret i8 [[Y]]
+;
+  %y = add nuw i8 %x, 128
+  ret i8 %y
 }
 
 define i1 @test21(i32 %x) {

Modified: llvm/trunk/test/Transforms/InstCombine/icmp-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp-add.ll?rev=294524&r1=294523&r2=294524&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/icmp-add.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/icmp-add.ll Wed Feb  8 16:14:11 2017
@@ -106,3 +106,27 @@ define <2 x i1> @slt_zero_add_nsw_splat_
   ret <2 x i1> %cmp
 }
 
+; FIXME: InstCombine should not lose wrapping information by changing the add to xor.
+
+define i1 @slt_zero_add_nsw_signbit(i8 %x) {
+; CHECK-LABEL: @slt_zero_add_nsw_signbit(
+; CHECK-NEXT:    [[Z:%.*]] = icmp sgt i8 %x, -1
+; CHECK-NEXT:    ret i1 [[Z]]
+;
+  %y = add nsw i8 %x, -128
+  %z = icmp slt i8 %y, 0
+  ret i1 %z
+}
+
+; FIXME: InstCombine should not lose wrapping information by changing the add to xor.
+
+define i1 @slt_zero_add_nuw_signbit(i8 %x) {
+; CHECK-LABEL: @slt_zero_add_nuw_signbit(
+; CHECK-NEXT:    [[Z:%.*]] = icmp sgt i8 %x, -1
+; CHECK-NEXT:    ret i1 [[Z]]
+;
+  %y = add nuw i8 %x, 128
+  %z = icmp slt i8 %y, 0
+  ret i1 %z
+}
+

Modified: llvm/trunk/test/Transforms/InstCombine/sub-xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/sub-xor.ll?rev=294524&r1=294523&r2=294524&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/sub-xor.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/sub-xor.ll Wed Feb  8 16:14:11 2017
@@ -48,13 +48,3 @@ define i32 @test3(i32 %x) {
   ret i32 %add
 }
 
-define i32 @test4(i32 %x) {
-; CHECK-LABEL: @test4(
-; CHECK-NEXT:    [[ADD:%.*]] = add i32 %x, -2147483606
-; CHECK-NEXT:    ret i32 [[ADD]]
-;
-  %sub = xor i32 %x, 2147483648
-  %add = add i32 %sub, 42
-  ret i32 %add
-}
-