[PATCH] D28891: add support for Cavium ThunderX ARM64 processors

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 19 10:42:29 PST 2017

MatzeB added inline comments.

Comment at: lib/Target/AArch64/AArch64Subtarget.cpp:90
+    MaxPrefetchIterationsAhead = 8;
+    HasLSE = true;
+    PrefFunctionAlignment = 4;
HasLSE and HasV8_1aOps are already modeled as target features and should not set here. This switch exists because we cannot model integer (or any non-boolean) values with target features today. The rest should go to AArch64.td where you already added it anyway it seems.



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