[PATCH] D28254: [AArch64][CostModel] Improve cost for fsqrt intrinsics.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

> I have very limited knowledge of the cost model, so I tried to pick fairly conservative values as a starting point. In looking at the ongoing work on the X86 side it appears these values reflect the latency of the instruction. However, a discussion with @mssimpso led me to believe the AArch64 cost model doesn't directly use the instruction latencies.

At the TTI level the costs should represent throughput, as that is more useful for determining the benefit of vectorization; for fsqrt/fdiv units this is often equal (or almost equal) to the latency. Additionally it might get more complicated if the sqrt/div unit is only a 64-bit ALU and you're processing 128-bit vectors but from your example costs it doesn't look it.



================
Comment at: lib/Target/AArch64/AArch64TargetTransformInfo.cpp:504
+    { ISD::FSQRT, MVT::v2f64, 5 },
+  };
+
----------------
I don't know the range of costs that AARCH64 cores can have here - for x86 we tend to qualify these by mentioning the core type that we used for the costs in a comment. But AARCH64 is younger so might still be more consistent!


https://reviews.llvm.org/D28254