[PATCH] D23931: [XRay] ARM 32-bit no-Thumb support in LLVM

Renato Golin via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 31 08:37:19 PDT 2016

rengolin added a comment.

In https://reviews.llvm.org/D23931#530324, @rSerge wrote:

> I'm not targeting all ARM architectures at once, at least not in the first commit. I think we should choose 1 ARM architecture for which XRay works, and assume the others not supported or experimental. Currently I am building and experimenting with `armhf` (32-bit).

Right, "armhf" is not one ARM architecture, but dozens. It can be anything from v6T2 to V8.2A, including all sub-architectures, features and variations. Though, from what I've seen so far, the code you use would work on any architecture of that range.

It would be safer, though, to document the *intended* target specifically, like "ARMv7A with VFPv3 support". So that people with "ARMv6T2 with VFPv2" support are not surprised when you assumed something "wrong" for them. Adding a "hasV6T2Ops()" check on the entry-point would help.

> Sled sizes do not have to fit all architectures either (this would result in waste of space for some, thus worse performance due to cache misses). Currently sleds are 11 bytes on x86_64 and 28 bytes on `armhf`.


> What is PCS ?

Procedure Call Standard. This is the part of the ABI that defines how functions are called to be compatible with the ABI. Mostly about how to serialise arguments and return values in registers, stack, etc.

Both C and C++, as well as any other language that wants to be compatible with ARM's EABI standard *have* to abide to those terms.

> Thumb is not supported yet.

Do you mean not supported in the Sled code, or inserting ARM Sled code into Thumb functions?

If the former, then you have to check if the architecture/OS/ABI you're supporting allows ARM code. For instance, Windows doesn't.

If the latter, than you need to check if the architecture/OS/ABI you're supporting allows Thumb code. For instance, there could be libraries around, or even inline assembly with ".thumb" in it (yes, this does happen). I can't remember how, but there's a way to know what's the ISA for a specific function, this could help you. OTOH, this could be an assembler things, can't remember.

Any way, you need to check if the architecture/OS/ISA/ABI you have is compatible with your assumptions before you emit code.

> Architectures which do not support BLX are not supported.

Fair enough. But as I said earlier, this has to be clearly encoded (via error messages) on the entry-point of your code.

> Any evidence that `POP {lr}` is deprecated?

Sorry, my bad. I was thinking about a different case. Ignore me.

> Any specific examples which more tests should be added for the single supported architecture `armhf`?

As I said earlier, you need to make sure you only emit your stubs on architectures that you know works. Checking the target for architecture level, ISA support and ABI should be enough, at least on the entry-point.

Adding tests is, then, easily done by having two files: one where everything should fail, RUNning with a "not" before "llc", CHECKing for error messages, and one where everything should pass, CHECKing for the correct sequence of Nops, etc.

It should be fine to add all error messages to one file and all cases that should pass to another.


Comment at: lib/Target/ARM/ARMMCInstLower.cpp:181
@@ +180,3 @@
+  //
+  //   PUSH{ r0, lr }
+  //   MOVW r0, #<lower 16 bits of function ID>
Right, and these are guaranteed to only use one 32-bit argument. Check.

Comment at: lib/Target/ARM/ARMMCInstLower.cpp:187
@@ +186,3 @@
+  //   BLX ip
+  //   POP{ r0, lr }
+  //
D'oh, Branch&Link, sorry, you're correct.

Comment at: test/CodeGen/ARM/xray-attribute-instrumentation.ll:5
@@ +4,3 @@
+; CHECK-LABEL: Lxray_sled_0:
+; CHECK-NEXT:  .ascii "\005\000\000\352"
+; CHECK-NEXT:  .ascii  "\000\360 \343"
I was expecting Nops...


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