[llvm] r274626 - Re-commit of 274613.

[Eli Friedman via llvm-commits]

On Wed, Jul 6, 2016 at 7:15 AM, Elena Demikhovsky via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: delena
> Date: Wed Jul  6 09:15:43 2016
> New Revision: 274626
>
> URL: http://llvm.org/viewvc/llvm-project?rev=274626&view=rev
> Log:
> Re-commit of 274613.
>
> The prev commit failed on compilation.
> A minor change in one pattern in lib/Target/X86/X86InstrAVX512.td fixes
> the failure.
>
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86FastISel.cpp
>     llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>     llvm/trunk/lib/Target/X86/X86InstrAVX512.td
>     llvm/trunk/test/CodeGen/X86/avx512-cmp.ll
>     llvm/trunk/test/CodeGen/X86/avx512-ext.ll
>     llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll
>     llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
>     llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
>     llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll
>     llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
>     llvm/trunk/test/CodeGen/X86/pr27591.ll
>     llvm/trunk/test/CodeGen/X86/pr28173.ll
>     llvm/trunk/test/CodeGen/X86/xaluo.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=274626&r1=274625&r2=274626&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Jul  6 09:15:43 2016
> @@ -1404,6 +1404,9 @@ bool X86FastISel::X86SelectCmp(const Ins
>    if (!isTypeLegal(I->getOperand(0)->getType(), VT))
>      return false;
>
> +  if (I->getType()->isIntegerTy(1) && Subtarget->hasAVX512())
> +    return false;
> +
>    // Try to optimize or fold the cmp.
>    CmpInst::Predicate Predicate = optimizeCmpPredicate(CI);
>    unsigned ResultReg = 0;
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=274626&r1=274625&r2=274626&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Jul  6 09:15:43 2016
> @@ -15551,8 +15551,11 @@ SDValue X86TargetLowering::LowerSETCC(SD
>        isNullConstant(Op1) &&
>        (CC == ISD::SETEQ || CC == ISD::SETNE)) {
>      if (SDValue NewSetCC = LowerToBT(Op0, CC, dl, DAG)) {
> -      if (VT == MVT::i1)
> +      if (VT == MVT::i1) {
> +        NewSetCC = DAG.getNode(ISD::AssertZext, dl, MVT::i8, NewSetCC,
> +                               DAG.getValueType(MVT::i1));
>          return DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, NewSetCC);
> +      }
>

Why are we generating AssertZext(SETCC(...))? AssertZext is meant to be
used in cases where SelectionDAG can't compute whether the upper bits are
zero; inserting extra AssertZext nodes in places where we can trivially
prove the top bits are zero just makes it more difficult to write
optimizations.

-Eli
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