[PATCH] D22114: [InstCombine] extend vector select matching for non-splat constants

[Sanjay Patel via llvm-commits]

spatel added a comment.

In http://reviews.llvm.org/D22114#482283, @eli.friedman wrote:

> I would lean towards making shufflevector canonical. It interacts better with existing transforms involving shuffles and vector insert/extract.  I can't think of any benefit to making the select form canonical.


I don't have a strong opinion on what we do here in IR, but IMO, a bitwise or element-level vector select is a required feature of any vector ISA - although x86 took 5+ ISA revs to get it :) . The more general vector shuffle/permute is not required.

I filed PR28530 and PR28531 to make at least ARM and PPC aware of their existing behavior and the proposal:
https://llvm.org/bugs/show_bug.cgi?id=28530
https://llvm.org/bugs/show_bug.cgi?id=28531 (note the VMX tragedy - we eliminated the logic ops in IR, and they came back in codegen!)


http://reviews.llvm.org/D22114