[PATCH] D20965: [X86][SSE] Add general lowering of nontemporal vector loads

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

In http://reviews.llvm.org/D20965#448279, @craig.topper wrote:

> let me rephrase that question. If we replace the intrinsic with generic IR, would we end up combining those loads into instructions during isel?


At present yes, if we replace the intrinsics then cases that currently don't fold would then start folding - that's why I added those tests to nontemporal-loads.ll to make sure we fix that before moving to generic ir.

We have very few cases of folding stores but the ones I've tested (_mm_extract_epi* and __mm256_cvtps_ph) don't seem to fold non-temporal stores so its certainly possible (whether its intended or not is another question.......).


Repository:
  rL LLVM

http://reviews.llvm.org/D20965