[PATCH] D20965: [X86][SSE] Add general lowering of nontemporal vector loads

[Craig Topper via llvm-commits]

craig.topper added a comment.

let me rephrase that question. If we replace the intrinsic with generic IR, would we end up combining those loads into instructions during isel?


Repository:
  rL LLVM

http://reviews.llvm.org/D20965