[PATCH] D20598: [X86] Detect SAD patterns and emit psadbw instructions on X86 redux

Wei Mi via llvm-commits llvm-commits at lists.llvm.org
Thu May 26 11:08:07 PDT 2016

wmi added inline comments.

Comment at: lib/Target/X86/X86ISelLowering.cpp:29475
@@ +29474,3 @@
+    // just take the low part of the sad without losing any elements.
+    if (VT.getSizeInBits() < ResVT.getSizeInBits())
+      Sad = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Sad,
mkuper wrote:
> wmi wrote:
> > wmi wrote:
> > > The condition can be represented using NumConcat == 0
> > Can be represented as NumConcat == 0?
> Right, I thought it was clearer this way. I can change it to NumConcat == 0 if you prefer. But, to be honest, I'd rather actually get rid of NumConcat in the condition above, and make that an explicit comparison as well.
> What do you think?
Get rid of NumConcat is better.


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