[PATCH] D16723: [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target.

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 1 21:57:06 PST 2016

arsenm added inline comments.

Comment at: lib/Target/AMDGPU/AMDGPU.td:306
@@ -305,2 +305,3 @@
   let guessInstructionProperties = 1;
+  let decodePositionallyEncodedOperands = 1;
   let noNamedPositionallyEncodedOperands = 1;
SamWot wrote:
> arsenm wrote:
> > tstellarAMD wrote:
> > > We should fix these name mismatches rather than enabling this bit.  It is much safer to use the name based matching.
> > I think we should change the names to vdst. The way it is now I think follows the names of the operands as they appear in the ISA documentation, but the document isn't perfectly consistent. This is because a few instructions have a second sdst
> Problem here is that renaming to vdst will affect all patterns that match this type of instructions. Also I'm not sure if this is realy needed because LLVM will still match operands positionalybut with help of operand names.
This shouldn't be difficult. It would be best to start out always using the names. It took a while to enable noNamedPositionallyEncodedOperands


More information about the llvm-commits mailing list