[PATCH] D16734: [AArch64] Simplify prolog/epilog callee save/restore. NFC.

George Burgess IV via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 1 01:10:01 PST 2016


george.burgess.iv added a subscriber: george.burgess.iv.
george.burgess.iv added a comment.

Thanks for doing this!

I just have two tiny nits for you. :)


================
Comment at: lib/Target/AArch64/AArch64FrameLowering.cpp:682
@@ +681,3 @@
+    const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI,
+    SmallVector<RegPairInfo, 8> &RegPairs) {
+
----------------
Can this take a `SmallVectorImpl<RegPairInfo> &` instead?

================
Comment at: lib/Target/AArch64/AArch64FrameLowering.cpp:687
@@ -680,3 +686,3 @@
 
   for (unsigned i = 0; i < Count; i += 2) {
     unsigned idx = Count - i - 2;
----------------
It seems that you always add `Count/2` elements to `RegPairs`. Is there any harm in reserving this amount of space in `RegPairs` ahead of time?


http://reviews.llvm.org/D16734





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