[PATCH] D15735: AMDGPU/SI: Fix encoding of flat instructions on VI

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 23 07:11:25 PST 2015

tstellarAMD marked an inline comment as done.

Comment at: lib/Target/AMDGPU/SIInstrInfo.td:2598
@@ +2597,3 @@
+    dag outs = (outs regClass:$vdst),
+    dag ins = (ins VReg_64:$addr, glc_flat:$glc, slc_flat:$slc, tfe_flat:$tfe),
+    string asm = asm_name#" $vdst, $addr"#"$glc"#"$slc"#"$tfe"> {
The assembler needs to know the full list of optional operands when parsing, so glc_flat, slc_flat, tfe_flat all map to the same list of optional operands.  The optional operands are different for flat than mubuf, which is why they need a different operand type.

Comment at: test/MC/AMDGPU/flat.s:4-9
@@ -3,4 +3,8 @@
-// FIXME: These instructions give an 'invalid operand' error on SI and should
-// instead be reporting an 'instruction not supported' error.
+// FIXME: For missing instruction the error message is:
+//  error: too few operands for instruction
+// It should be:
+//  error: instruction not supported on this GPU
+// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI
This is a bug in the AMDGPU backend and how we implement optional operands.  I have an idea for generic optional operand handling which should fix this an simplify a number of things in the assembler.


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