[PATCH] D15735: AMDGPU/SI: Fix encoding of flat instructions on VI

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 23 13:08:17 PST 2015

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.


Comment at: lib/Target/AMDGPU/SIInstrInfo.td:2598
@@ +2597,3 @@
+    dag outs = (outs regClass:$vdst),
+    dag ins = (ins VReg_64:$addr, glc_flat:$glc, slc_flat:$slc, tfe_flat:$tfe),
+    string asm = asm_name#" $vdst, $addr"#"$glc"#"$slc"#"$tfe"> {
tstellarAMD wrote:
> The assembler needs to know the full list of optional operands when parsing, so glc_flat, slc_flat, tfe_flat all map to the same list of optional operands.  The optional operands are different for flat than mubuf, which is why they need a different operand type.
I don't get why this would matter. We already have some instructions that may or may not have clamp etc.


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