[PATCH] D13436: AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp

Tom Stellard via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 5 20:49:40 PDT 2015


tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/SIInstructions.td:1163
@@ -1162,3 +1162,3 @@
 
 let isMoveImm = 1, isReMaterializable = 1, isAsCheapAsAMove = 1 in {
 defm V_MOV_B32 : VOP1Inst <vop1<0x1>, "v_mov_b32", VOP_I32_I32>;
----------------
arsenm wrote:
> Should it also be set here for v_mov_b32?
No, because the assembler can infer the encoding size from the operands of V_MOV_B32.  V_NOP needs that, otherwise it will default to using the 64-bit encoding.


http://reviews.llvm.org/D13436





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