[PATCH] D11407: [ARM] - Fix lowering of shufflevectors in AArch32
luke.cheeseman at arm.com
Wed Jul 22 03:14:24 PDT 2015
LukeCheeseman created this revision.
LukeCheeseman added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.
Some shufflevectors are currently being incorrectly lowered in the AArch32 backend as the existing checks for detecting the NEON operations from the shufflevector instruction expects the shuffle mask and the vector operands to be of the same length.
This is not always the case as the mask may be twice as long as the operand; here only the lower half of the shufflemask gets checked, so provided the lower half of the shufflemask looks like a vector transpose (or even is just all -1 for undef) then the intrinsics may get incorrectly lowered into a vector transpose (VTRN) instruction.
This patch fixes this by accommodating for both cases and adds regression tests.
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