[PATCH] InstCombine: cannot fold "fcmp x, undef" because x can be NaN

[Mehdi AMINI]

Hi chandlerc, hfinkel,

See the two test cases.

; Can't fold fcmp with undef on one side
; To be able to fold
;   fcmp pred x, undef -> undef
; one need to prove that for all possible value of x, there exist
; one value for undef that makes the comparison false, and another
; value value for undef that makes the comparison true
; The possibility of NaN prevents the folding

I wonder if we could access the target machine specific info to know
if NaN are disabled?
Or what is the right way of getting the -enable-no-nans-fp-math in opt?

http://reviews.llvm.org/D7617

Files:
  lib/Analysis/InstructionSimplify.cpp
  test/Transforms/InstCombine/fcmp.ll

Index: lib/Analysis/InstructionSimplify.cpp
===================================================================
--- lib/Analysis/InstructionSimplify.cpp
+++ lib/Analysis/InstructionSimplify.cpp
@@ -3040,7 +3040,8 @@
   if (Pred == FCmpInst::FCMP_TRUE)
     return ConstantInt::get(GetCompareTy(LHS), 1);
 
-  if (isa<UndefValue>(RHS))                  // fcmp pred X, undef -> undef
+  // fcmp pred undef, undef -> undef
+  if (isa<UndefValue>(RHS) && isa<UndefValue>(LHS))
     return UndefValue::get(GetCompareTy(LHS));
 
   // fcmp x,x -> true/false.  Not all compares are foldable.
Index: test/Transforms/InstCombine/fcmp.ll
===================================================================
--- test/Transforms/InstCombine/fcmp.ll
+++ test/Transforms/InstCombine/fcmp.ll
@@ -240,3 +240,29 @@
   %conv = zext i1 %cmp to i32
   ret i32 %conv
 }
+
+; Can't fold fcmp with undef on one side
+; To be able to fold
+;   fcmp pred x, undef -> undef
+; one need to prove that for all possible value of x, there exist
+; one value for undef that makes the comparison false, and another
+; value value for undef that makes the comparison true
+; The possibility of NaN prevents the folding
+define i32 @test18_undef(float %a) nounwind {
+; CHECK-LABEL: @test18_undef
+; CHECK-NOT: ret 0
+; CHECK-NOT: ret 1
+  %cmp = fcmp ueq float %a, undef
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}
+
+; Can fold fcmp with undef on both side
+;   fcmp pred undef, undef -> undef
+; even if one NaN is undef, you can alway chose
+define i1 @test19_undef() nounwind {
+; CHECK-LABEL: @test19_undef
+; CHECK: ret i1 undef
+  %cmp = fcmp ueq float undef, undef
+  ret i1 %cmp
+}

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