[PATCH] Improve DAG combine pass on certain IR vector patterns

Fiona Glaser fglaser at apple.com
Fri Jan 16 16:28:38 PST 2015

> On Jan 16, 2015, at 4:23 PM, Quentin Colombet <qcolombet at apple.com> wrote:
> On Jan 16, 2015, at 4:19 PM, Fiona Glaser <fglaser at apple.com> wrote:
>> Okay, I ported the test case to aarch64 and armv7.
> Thanks for checking. That is what I would have suggested.
>> My patch doesn’t change the code output with i16 or float vectors. The current status of those is:
>> armv7/aarch64 float vectors: ideal code
>> armv7 with i16 vectors: bad code, but same for all three IRs
>> aarch64 with i16 vectors: bad code, which turns into utterly awful code for the first two out of three IRs.
> I thought your patch would have make all the 3 IRs to generate the same not so bad code.
> Feel free to double check why this is not the case, but anyway LGTM!

It looks like the failures are in other parts of the DAG here; it somehow manages to vomit extract_vector_elt and BUILD_VECTOR all over the place and fail to reassemble it to begin with, unlike x86 where it reassembled it, just sub optimally.


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