[PATCH] Fix bug in GPR to FPR moves in PPC64LE

Samuel F Antao sfantao at us.ibm.com
Thu Oct 9 11:16:32 PDT 2014

Hi all,

The current implementation of GPR->FPR register moves uses a stack slot.
This mechanism writes a double word and reads a word. In big-endian the
load address must be displaced by 4-bytes in order to get the right value.
In little endian this is no longer required. This patch fixes the issue and
adds LE regression tests to fast-isel-conversion which currently expose
this problem.

This move can be done using the VSX capabilities that are currently
deactivated due to some other problems. I understand Bill and Bill are
fixing some of the VSX issues in FastISel, but this patch seems to be
orthogonal to that. I can contribute another implementation of the moves
using these instructions, which I've already implemented, once it is okay
to activate VSX for little endian.

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