[PATCH] [llvm] [Hexagon] Adding tests, TableGen entries, and code for emitting add opcode.

colinl at codeaurora.org colinl at codeaurora.org
Wed Oct 8 13:53:54 PDT 2014

Comment at: unittests/MC/Hexagon/HexagonMCCodeEmitterTest.cpp:57
@@ +56,3 @@
+/// \brief Instruction encoding with different register numbers
+TEST(HexagonMCCodeEmitter, add_Rd_Rs_Rt) {
+  std::string str;
rafael wrote:
> Why can't you test this with llvm-mc?  It seems a much better way of testing this then by manually creating instructions in a unit test.
The plan was to get the integrated assember updated before putting in the assembler parser which is non-existent at the moment.

We thought it could also help narrowing down issues by testing the code emission in isolation.

What do you think?


More information about the llvm-commits mailing list