[PATCH] [Power] Use lwsync for non-seq_cst fences
morisset at google.com
Fri Oct 3 08:50:33 PDT 2014
I will add the test with ppc440.
This path is only for fences, and I do not think a monotonic fence makes
much sense. So it is not special cased (but should trigger a bunch of
errors earlier in the front-end or at least asserts in the middle-end).
Thanks for the reviews !
On Thu, Oct 2, 2014 at 9:14 PM, hfinkel at anl.gov <hfinkel at anl.gov> wrote:
> Please add a test run with ppc440 to make sure we still get msync.
> Comment at: lib/Target/PowerPC/PPCInstrInfo.td:2559
> @@ -2553,1 +2558,3 @@
> +def : Pat<(atomic_fence (i32 7), (imm)), (SYNC 0)>, Requires<[HasSYNC]>;
> +def : Pat<(atomic_fence (imm), (imm)), (SYNC 1)>, Requires<[HasSYNC]>;
> def : Pat<(atomic_fence (imm), (imm)), (MSYNC)>, Requires<[HasOnlyMSYNC]>;
> By the way, what happens to AtomicOrdering == 2 (which is Monotonic). Is
> that (should that be) a noop?
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