[AVX512] Add masking variants for vextract*x4

Robert Khasanov rob.khasanov at gmail.com
Wed Oct 1 09:30:55 PDT 2014

Hi Adam,

About maskings in vextract*x4 instructions. I think we can include VK4
register class and v4i1 type for AVX512F subset as it is needed by
instruction semantics. Elena, do you agree? It would be better keep all
intrinsics lowering in one place.


0001: LGTM, anyway. It should be committed even though we decided to
include VK4 register class for AVX512F subset, because it would be helpful
for other instructions (e.g. CMP that will override masking patterns)

0004: I don't understand why you use "AVX512_masking_asm_only" naming. It's
not obvious from this name that only non-masking pattern is used.

2014-10-01 17:47 GMT+04:00 Demikhovsky, Elena <elena.demikhovsky at intel.com>:

> 0003 : LGTM
> -  Elena
> -----Original Message-----
> From: Adam Nemet [mailto:anemet at apple.com]
> Sent: Wednesday, October 01, 2014 08:57
> To: Demikhovsky, Elena; Robert Khasanov
> Cc: LLVM Commits
> Subject: [AVX512] Add masking variants for vextract*x4
> Hi Elena and Robert,
> First I tried to implement this with the usual intrinsic lowering but
> unfortunately because vextract*x4 produces v4* vectors I would have needed
> VK4 and v4i1 for masking in AVX512f which only come with AVX512vl.  I don't
> think these intrinsics are worth the hassle making that work so instead I
> went for asm-only instructions.  Then I have the intrinsics Pat<>s to call
> the corresponding instruction.
> This approach gave me a chance to incorporate asm-only masking support
> into the AVX512_masking hierarchy.  See patch 1 and 4.
> Also the masking operand was not supported with the MRMDestReg format, so
> I've added that too.  See patch 2.
> Please let me know if it looks good to you.
> Thanks,
> Adam
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