[PATCH] Add experimental PBQP support

[David Blaikie]

This'll probably show how little I know about register allocation - but I
thought Lang was telling me the other day that PBQP is essentially a
drop/opt in for any architecture without having specific code for it
(learning about the register set from the tablegen files and that was all
it needed).

Is that the case? Is the extra code in your patch then tuning, essentially
- making PBQP better than the baseline table-driven PBQP for AArch64/A57?
Or is my understanding incorrect?

- David


On Fri, Sep 5, 2014 at 1:49 PM, Arnaud A. de Grandmaison <
arnaud.degrandmaison at arm.com> wrote:

> I am currently investigating the benefits the PBQP register allocator
> could bring to the AArch64/A57.
>
>
>
> This patch adds experimental support for PBQP. The PBQP is disabled by
> default, and can be enabled with the ‘–aarch64-pbqp’ command line option to
> llc when the cortex-a57 is in use.
>
>
>
> I thought it would be a good thing to upstream this patch, as some other
> people in the community could be interested in experimenting with this
> allocator.
>
>
>
> It passes all the tests (LNT, spec, …), but the performance of the
> generated code is not optimal yet. Expect some more patches in the coming
> days to improve the performance.
>
>
>
> Cheers,
>
> --
>
> Arnaud A. de Grandmaison
>
>
>
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