[PATCH] Teach the AArch64 backend about half-precision floating point

[Tim Northover]

Hi Oliver,

Thanks for working on this, it looks like it might really be a set of patches that should be analysed separately.

First, there's the "deal with vNf16 natively in AArch64 where possible". This looks largely fine, though even that would be a bit better sub-divided into function-calls, loads, casts, ... for commit.

Then there's the promotion. I think that's rather more problematic. In general trunc . OP32 . extend != OP16. Apparently, it *does* work for add, sub, div, mul & sqrt, but explicitly not for fma. Personally, I'd be extremely surprised if it worked for the transcendental functions, but I haven't tried to prove it.

So we want to be very careful in that area. If we really want to support half as a native type, we'll probably need to add libcalls for some operations.

Now, this clearly ties in with D4456, and I'm guessing you added the promotion logic because it makes clang emit fptrunc/fpext which then gets optimised. In that case, the operations that *do* get optimised should be safe, so a more limited set of promotions is probably workable.

Cheers.

Tim.

http://reviews.llvm.org/D4879