[PATCH] Move Post RA Scheduling flag bit into SchedMachineModel

[Sanjay Patel]

Hi hfinkel, nadav,

Currently, there's an "X86ProcFamily" enum that is used to enable post-register-allocator code scheduling for Atom CPU variants. It would be better to explicitly enable/disable this scheduler feature using a flag in the subtarget's SchedMachineModel rather than a bit in the X86Subtarget class.

This minimal patch just moves the PostRAScheduler flag bit and fixes up the accesses to that bit. Subsequent patches will clean up the X86ProcFamilyEnum. Other targets (ARM also has a PostRAScheduler bit in ARMSubtarget.h) may want to make a similar change to keep uniformity, or maybe it's better to move this bit into the parent TargetSubtargetInfo?

No change to codegen for any target is intended with this patch.

http://reviews.llvm.org/D4217

Files:
  include/llvm/MC/MCSchedule.h
  include/llvm/Target/TargetSchedule.td
  lib/Target/X86/X86Schedule.td
  lib/Target/X86/X86ScheduleAtom.td
  lib/Target/X86/X86ScheduleSLM.td
  lib/Target/X86/X86Subtarget.cpp
  lib/Target/X86/X86Subtarget.h
  utils/TableGen/SubtargetEmitter.cpp
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