[PATCH] ARM: Implement big endian bit-conversion for NEON types

Christian Pirker cpirker at a-bix.com
Wed May 7 10:34:39 PDT 2014

Hi James,

> Whereabouts, exactly? I see no changes to the calling convention .td or the calling convention parts of ISel lowering.

These conversions are done implicitly when fitting a vector value into a GPR(s), therefore no changes in the calling convetions .td.


Comment at: lib/Target/ARM/ARMFastISel.cpp:192
@@ -191,1 +191,3 @@
+    const TargetLowering* getTargetLowering() { return TM.getTargetLowering(); }
James Molloy wrote:
> Christian Pirker wrote:
> > James Molloy wrote:
> > > This function seems unused?
> > This function is required to evaluate the [IsBE] predicate for the bitconversion rules that specify the VREV instructions.
> But that predicate isn't defined anywhere in this patch.
The [IsBE] predicate is defined in ARMInstrInfo.td (see line 305).


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