[llvm] r208129 - If a function needs a frame pointer, but r11 (aka fp) has not been used,
Joerg Sonnenberger
joerg at bec.de
Tue May 6 13:43:01 PDT 2014
Author: joerg
Date: Tue May 6 15:43:01 2014
New Revision: 208129
URL: http://llvm.org/viewvc/llvm-project?rev=208129&view=rev
Log:
If a function needs a frame pointer, but r11 (aka fp) has not been used,
remove it from the list of unspilled registers. Otherwise the following
attempt to keep the stack aligned by picking an extra GPR register to
spill will not work as it picks up r11.
Modified:
llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
llvm/trunk/test/CodeGen/ARM/debug-frame-vararg.ll
llvm/trunk/test/CodeGen/ARM/debug-frame.ll
llvm/trunk/test/CodeGen/ARM/ehabi.ll
llvm/trunk/test/CodeGen/ARM/interrupt-attr.ll
llvm/trunk/test/CodeGen/ARM/segmented-stacks-dynamic.ll
Modified: llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp Tue May 6 15:43:01 2014
@@ -1529,6 +1529,10 @@ ARMFrameLowering::processFunctionBeforeC
if (hasFP(MF)) {
MRI.setPhysRegUsed(FramePtr);
+ auto FPPos = std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.end(),
+ FramePtr);
+ if (FPPos != UnspilledCS1GPRs.end())
+ UnspilledCS1GPRs.erase(FPPos);
NumGPRSpills++;
}
Modified: llvm/trunk/test/CodeGen/ARM/debug-frame-vararg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-frame-vararg.ll?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-frame-vararg.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-frame-vararg.ll Tue May 6 15:43:01 2014
@@ -75,12 +75,13 @@
; CHECK-FP-ELIM: .cfi_startproc
; CHECK-FP-ELIM: sub sp, sp, #16
; CHECK-FP-ELIM: .cfi_def_cfa_offset 16
-; CHECK-FP-ELIM: push {r4, r11, lr}
-; CHECK-FP-ELIM: .cfi_def_cfa_offset 28
+; CHECK-FP-ELIM: push {r4, r10, r11, lr}
+; CHECK-FP-ELIM: .cfi_def_cfa_offset 32
; CHECK-FP-ELIM: .cfi_offset lr, -20
; CHECK-FP-ELIM: .cfi_offset r11, -24
-; CHECK-FP-ELIM: .cfi_offset r4, -28
-; CHECK-FP-ELIM: add r11, sp, #4
+; CHECK-FP-ELIM: .cfi_offset r10, -28
+; CHECK-FP-ELIM: .cfi_offset r4, -32
+; CHECK-FP-ELIM: add r11, sp, #8
; CHECK-FP-ELIM: .cfi_def_cfa r11, 24
; CHECK-THUMB-FP-LABEL: sum
Modified: llvm/trunk/test/CodeGen/ARM/debug-frame.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-frame.ll?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-frame.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-frame.ll Tue May 6 15:43:01 2014
@@ -201,12 +201,13 @@ declare void @_ZSt9terminatev()
; CHECK-V7-FP-LABEL: _Z4testiiiiiddddd:
; CHECK-V7-FP: .cfi_startproc
-; CHECK-V7-FP: push {r4, r11, lr}
-; CHECK-V7-FP: .cfi_def_cfa_offset 12
+; CHECK-V7-FP: push {r4, r10, r11, lr}
+; CHECK-V7-FP: .cfi_def_cfa_offset 16
; CHECK-V7-FP: .cfi_offset lr, -4
; CHECK-V7-FP: .cfi_offset r11, -8
-; CHECK-V7-FP: .cfi_offset r4, -12
-; CHECK-V7-FP: add r11, sp, #4
+; CHECK-V7-FP: .cfi_offset r10, -12
+; CHECK-V7-FP: .cfi_offset r4, -16
+; CHECK-V7-FP: add r11, sp, #8
; CHECK-V7-FP: .cfi_def_cfa r11, 8
; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
; CHECK-V7-FP: .cfi_offset d12, -24
@@ -214,7 +215,7 @@ declare void @_ZSt9terminatev()
; CHECK-V7-FP: .cfi_offset d10, -40
; CHECK-V7-FP: .cfi_offset d9, -48
; CHECK-V7-FP: .cfi_offset d8, -56
-; CHECK-V7-FP: sub sp, sp, #28
+; CHECK-V7-FP: sub sp, sp, #24
; CHECK-V7-FP: .cfi_endproc
; CHECK-V7-FP-ELIM-LABEL: _Z4testiiiiiddddd:
Modified: llvm/trunk/test/CodeGen/ARM/ehabi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ehabi.ll?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/ehabi.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/ehabi.ll Tue May 6 15:43:01 2014
@@ -148,14 +148,14 @@ declare void @_ZSt9terminatev()
; CHECK-V7-FP-LABEL: _Z4testiiiiiddddd:
; CHECK-V7-FP: .fnstart
-; CHECK-V7-FP: .save {r4, r11, lr}
-; CHECK-V7-FP: push {r4, r11, lr}
-; CHECK-V7-FP: .setfp r11, sp, #4
-; CHECK-V7-FP: add r11, sp, #4
+; CHECK-V7-FP: .save {r4, r10, r11, lr}
+; CHECK-V7-FP: push {r4, r10, r11, lr}
+; CHECK-V7-FP: .setfp r11, sp, #8
+; CHECK-V7-FP: add r11, sp, #8
; CHECK-V7-FP: .vsave {d8, d9, d10, d11, d12}
; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
-; CHECK-V7-FP: .pad #28
-; CHECK-V7-FP: sub sp, sp, #28
+; CHECK-V7-FP: .pad #24
+; CHECK-V7-FP: sub sp, sp, #24
; CHECK-V7-FP: .personality __gxx_personality_v0
; CHECK-V7-FP: .handlerdata
; CHECK-V7-FP: .fnend
Modified: llvm/trunk/test/CodeGen/ARM/interrupt-attr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/interrupt-attr.ll?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/interrupt-attr.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/interrupt-attr.ll Tue May 6 15:43:01 2014
@@ -12,13 +12,13 @@ define arm_aapcscc void @irq_fn() aligns
; Also need special function return setting pc and CPSR simultaneously.
; CHECK-A-LABEL: irq_fn:
-; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
-; CHECK-A: add r11, sp, #16
-; CHECK-A: sub sp, sp, #{{[0-9]+}}
+; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
+; CHECK-A: add r11, sp, #20
+; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
; CHECK-A: bic sp, sp, #7
; CHECK-A: bl bar
-; CHECK-A: sub sp, r11, #16
-; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
+; CHECK-A: sub sp, r11, #20
+; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
; CHECK-A: subs pc, lr, #4
; CHECK-A-THUMB-LABEL: irq_fn:
@@ -35,15 +35,15 @@ define arm_aapcscc void @irq_fn() aligns
; Normal AAPCS function (r0-r3 pushed onto stack by hardware, lr set to
; appropriate sentinel so no special return needed).
; CHECK-M-LABEL: irq_fn:
-; CHECK-M: push {r4, r7, lr}
-; CHECK-M: add r7, sp, #4
+; CHECK-M: push {r4, r6, r7, lr}
+; CHECK-M: add r7, sp, #8
; CHECK-M: mov r4, sp
; CHECK-M: bic r4, r4, #7
; CHECK-M: mov sp, r4
; CHECK-M: blx _bar
-; CHECK-M: subs r4, r7, #4
+; CHECK-M: sub.w r4, r7, #8
; CHECK-M: mov sp, r4
-; CHECK-M: pop {r4, r7, pc}
+; CHECK-M: pop {r4, r6, r7, pc}
call arm_aapcscc void @bar()
ret void
@@ -88,13 +88,13 @@ define arm_aapcscc void @swi_fn() aligns
define arm_aapcscc void @undef_fn() alignstack(8) "interrupt"="UNDEF" {
; CHECK-A-LABEL: undef_fn:
-; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
-; CHECK-A: add r11, sp, #16
-; CHECK-A: sub sp, sp, #{{[0-9]+}}
+; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
+; CHECK-A: add r11, sp, #20
+; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
; CHECK-A: bic sp, sp, #7
; [...]
-; CHECK-A: sub sp, r11, #16
-; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
+; CHECK-A: sub sp, r11, #20
+; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
; CHECK-A: subs pc, lr, #0
call void @bar()
@@ -103,13 +103,13 @@ define arm_aapcscc void @undef_fn() alig
define arm_aapcscc void @abort_fn() alignstack(8) "interrupt"="ABORT" {
; CHECK-A-LABEL: abort_fn:
-; CHECK-A: push {r0, r1, r2, r3, r11, r12, lr}
-; CHECK-A: add r11, sp, #16
-; CHECK-A: sub sp, sp, #{{[0-9]+}}
+; CHECK-A: push {r0, r1, r2, r3, r10, r11, r12, lr}
+; CHECK-A: add r11, sp, #20
+; CHECK-A-NOT: sub sp, sp, #{{[0-9]+}}
; CHECK-A: bic sp, sp, #7
; [...]
-; CHECK-A: sub sp, r11, #16
-; CHECK-A: pop {r0, r1, r2, r3, r11, r12, lr}
+; CHECK-A: sub sp, r11, #20
+; CHECK-A: pop {r0, r1, r2, r3, r10, r11, r12, lr}
; CHECK-A: subs pc, lr, #4
call void @bar()
Modified: llvm/trunk/test/CodeGen/ARM/segmented-stacks-dynamic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/segmented-stacks-dynamic.ll?rev=208129&r1=208128&r2=208129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/segmented-stacks-dynamic.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/segmented-stacks-dynamic.ll Tue May 6 15:43:01 2014
@@ -29,7 +29,7 @@ false:
; ARM-linux-NEXT: cmp r4, r5
; ARM-linux-NEXT: blo .LBB0_2
-; ARM-linux: mov r4, #24
+; ARM-linux: mov r4, #16
; ARM-linux-NEXT: mov r5, #0
; ARM-linux-NEXT: stmdb sp!, {lr}
; ARM-linux-NEXT: bl __morestack
@@ -49,7 +49,7 @@ false:
; ARM-android-NEXT: cmp r4, r5
; ARM-android-NEXT: blo .LBB0_2
-; ARM-android: mov r4, #24
+; ARM-android: mov r4, #16
; ARM-android-NEXT: mov r5, #0
; ARM-android-NEXT: stmdb sp!, {lr}
; ARM-android-NEXT: bl __morestack
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