[PATCH] Optimize long branch for MIPS64 by removing calculation of %higher and %highest

[Sasa Stankovic]

  > @Sasa: You have confused me a bit by having interdependent changes in flight at the same time, which is why
  > I've been slow coming back to this.
  >
  > When you post an updated patch in reply to a review, could you possibly reply to each of the review comments,
  > even if it's just to say "Done"?

  > I wrote "Is this change based on your not-yet-committed change? If so, presumably you should remove
  > LONG_BRANCH_LUi64 too?". Since the current version of the patch does remove LONG_BRANCH_LUi64,
  > it looks like the answer to my first question was "yes", but it would be better if you answered directly, so that
  > I don't have to deduce it from the change to the patch.

  Actually I did answered, but I don't know why the answers were not visible; maybe because I sent them together with the updated patch, and they were related to the code that was removed. The answers were only visible in the link that  shows the change since the last diff. To your question:

  Is this change based on your not-yet-committed change? If you, presumably you should remove LONG_BRANCH_LUi64 too? Or you might want to commit this change first so that you don't have to add LONG_BRANCH_LUi64?

  I answered:

  I removed LONG_BRANCH_LUi64.

  And to your question:

  What does lui64 do?

  I answered:

  There is no lui64 (I fixed that comment), there is only a lui instruction (you can see it in .td file lib/Target/Mips/Mips64InstrInfo.td - mnemonic for MIPS64 LUi64 instruction is just "lui"). lui on MIPS64 sets bits 16-31 of a register, zeroes bits 15-0, and sign-extends bit 31 into higher part of the 64-bit register. MIPS64 supports all (or almost all) MIPS32 instructions, and they all operate like this - they change low 32 bits just like they do on MIPS32, and they sign-extend bit 31 into high 32 bits. MIPS64 also has instructions that operate on all 64 bits (their mnemonics start with d (from double)), but there is no instruction that sets bits 16-31 while clearing the others.

  I suppose that I should not send inline comments together with the updated patch, but rather before or after I send the patch.


================
Comment at: lib/Target/Mips/MipsLongBranch.cpp:328
@@ -330,2 +327,3 @@
+      //  daddiu $at, $zero, 0
       //  daddiu $at, $at, %hi($tgt - $baltgt)
       //  bal $baltgt
----------------
Mark Seaborn wrote:
> Does 64-bit MIPS not have an instruction for setting bits 16-31 of a register while zeroing the others (as 32-bit MIPS' "lui" instruction does)?
> 
> What does lui64 do?
> 
> This part looks OK to me, but I'm not familiar with 64-bit MIPS, so you might want to get someone who is sign off on the change too.
There is no lui64 (I fixed that comment), there is only a lui instruction (you can see it in .td file lib/Target/Mips/Mips64InstrInfo.td - mnemonic for MIPS64 LUi64 instruction is just "lui"). lui on MIPS64 sets bits 16-31 of a register, zeroes bits 15-0, and sign-extends bit 31 into higher part of the 64-bit register.  MIPS64 supports all (or almost all) MIPS32 instructions, and they all operate like this - they change low 32 bits just like they do on MIPS32, and they sign-extend bit 31 into high 32 bits. MIPS64 also has instructions that operate on all 64 bits (their mnemonics start with d (from double)), but there is no instruction that sets bits 16-31 while clearing the others.

================
Comment at: lib/Target/Mips/MipsLongBranch.cpp:353
@@ -352,3 +371,1 @@
         .addReg(Mips::SP_64).addImm(0);
-      BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi64), Mips::AT_64)
-        .addMBB(TgtMBB).addMBB(BalTgtMBB);
----------------
Mark Seaborn wrote:
> Is this change based on your not-yet-committed change?  If you, presumably you should remove LONG_BRANCH_LUi64 too?  Or you might want to commit this change first so that you don't have to add LONG_BRANCH_LUi64?
I removed LONG_BRANCH_LUi64.


http://reviews.llvm.org/D3281