[PATCH] Teach the DAGCombiner how to fold a OR of two shufflevector into a single shufflevector node

[Nadav Rotem]

Hi Andrea, 

Thanks for working on this.  Lowering shuffles is really difficult and we have >1000 LOC in the x86 backends for lowering shuffles.  It is really difficult to predict which shuffles are supported and which patterns result in slow code. Until now LLVM was *not* to introducing new shuffle patterns. The idea was that the users that generate the shuffle patterns should know if the patterns are supported by the target. This makes sense for users that write their own math libraries using the clang vector syntax. Your patch introduces new shuffle patterns that some backends may not know how to lower. I think that the code should be okay for AVX and AVX2 because you are not introducing cross-lane shuffles. So, I suggest that you move this patch into the X86 backend and protect it with the hasAVX flags. Does that make sense?

Thanks,
Nadav



On Feb 26, 2014, at 7:07 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote:

> <patch-dagcombine.diff>