XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE

[Richard Osborne]

+SDValue XCoreTargetLowering::
+LowerATOMICLOAD(SDValue Op, SelectionDAG &DAG) const {

Should be called LowerATOMIC_LOAD to match the opcode it is lowering

+  if (N->getMemoryVT() == MVT::i32) {
+    assert(N->getAlignment() >= 4 && "atomic load must be aligned");

Should this use llvm_report_error instead? The same applies to the other 
assertions about alignment.

+    return DAG.getLoad(getPointerTy(), SDLoc(Op), N->getChain(),
+                       N->getBasePtr(), N->getPointerInfo(),
+                       N->isVolatile(), N->isNonTemporal(),
+                       N->isInvariant(), 4);

This should preserve the alignment and the TBAAInfo. The same goes for 
the other loads and stores you create.

+SDValue XCoreTargetLowering::
+LowerATOMICSTORE(SDValue Op, SelectionDAG &DAG) const {

Should be called LowerATOMIC_STORE to match the opcode it is lowering

Looks good otherwise.

On 04/12/13 16:07, Robert Lytton wrote:
> Hi,
>
> Here is a patch for:
>     XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE
>
> Robert


-- 
Richard Osborne | XMOS
http://www.xmos.com

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