[PATCH][AArch64] Implemented vmul/vmux intrinsics

Ana Pazos apazos at codeaurora.org
Thu Nov 14 09:34:52 PST 2013


Is everyone ok with these changes? Can I commit? I have more patches to come
after this is in.




From: llvm-commits-bounces at cs.uiuc.edu
[mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Ana Pazos
Sent: Wednesday, November 13, 2013 7:41 PM
To: 'llvm-commits'; cfe-commits at cs.uiuc.edu
Cc: Jiangning Liu
Subject: [PATCH][AArch64] Implemented vmul/vmux intrinsics


Hi Tim, Jiangning and reviewers,

This new patch contains:

Implemented aarch64 vmul_lane intrinsics.
Implemented aarch64 vmulx_lane intrinsics,
Implemented aarch64 vmul_n_f64 intrinsic, mapping it to Neon scalar
Implemented aarch64 vmul_lane_f64 and vmul_laneq_f64 intrinsics, mapping
them to Neon scalar operation.
Added codegen patterns for scalar copy (DUP) with FP types.
Added Scalar Copy (DUP) MOV aliases.

The implementation was straightforward. I was able to create IR patterns for
most cases.

But to force vmul_n_f64, vmul_lane_f64, vmul_laneq_f64 legacy intrinsics to
map to Neon scalar operations I had to add an aarch64 IR intrinsic.

Otherwise the casting of result to float64x1_t might cause non-vector code
to be generated and the Neon scalar instruction cannot be guaranteed.

This has happened before with other Neon Scalar instructions and they were
handled in similar way.




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