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/* Font Definitions */
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
@font-face
{font-family:Tahoma;
panose-1:2 11 6 4 3 5 4 4 2 4;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0in;
margin-bottom:.0001pt;
font-size:11.0pt;
font-family:"Calibri","sans-serif";}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:blue;
text-decoration:underline;}
a:visited, span.MsoHyperlinkFollowed
{mso-style-priority:99;
color:purple;
text-decoration:underline;}
p
{mso-style-priority:99;
margin-top:12.0pt;
margin-right:0in;
margin-bottom:0in;
margin-left:0in;
margin-bottom:.0001pt;
font-size:12.0pt;
font-family:"Times New Roman","serif";}
span.EmailStyle18
{mso-style-type:personal;
font-family:"Calibri","sans-serif";
color:windowtext;}
span.EmailStyle19
{mso-style-type:personal-reply;
font-family:"Calibri","sans-serif";
color:#1F497D;}
.MsoChpDefault
{mso-style-type:export-only;
font-size:10.0pt;}
@page WordSection1
{size:8.5in 11.0in;
margin:1.0in 1.0in 1.0in 1.0in;}
div.WordSection1
{page:WordSection1;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
<o:idmap v:ext="edit" data="1" />
</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='color:#1F497D'>Pinging…<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Is everyone ok with these changes? Can I commit? I have more patches to come after this is in.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Ana.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> llvm-commits-bounces@cs.uiuc.edu [mailto:llvm-commits-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Ana Pazos<br><b>Sent:</b> Wednesday, November 13, 2013 7:41 PM<br><b>To:</b> 'llvm-commits'; cfe-commits@cs.uiuc.edu<br><b>Cc:</b> Jiangning Liu<br><b>Subject:</b> [PATCH][AArch64] Implemented vmul/vmux intrinsics<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>Hi Tim, Jiangning and reviewers,<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>This new patch contains:<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>Implemented aarch64 vmul_lane intrinsics.<br>Implemented aarch64 vmulx_lane intrinsics,<br>Implemented aarch64 vmul_n_f64 intrinsic, mapping it to Neon scalar operation.<br>Implemented aarch64 vmul_lane_f64 and vmul_laneq_f64 intrinsics, mapping them to Neon scalar operation.<br>Added codegen patterns for scalar copy (DUP) with FP types.<br>Added Scalar Copy (DUP) MOV aliases.<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>The implementation was straightforward. I was able to create IR patterns for most cases.<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>But to force vmul_n_f64, vmul_lane_f64, vmul_laneq_f64 legacy intrinsics to map to Neon scalar operations I had to add an aarch64 IR intrinsic.<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'><br>Otherwise the casting of result to float64x1_t might cause non-vector code to be generated and the Neon scalar instruction cannot be guaranteed.<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>This has happened before with other Neon Scalar instructions and they were handled in similar way.<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>Thanks,<o:p></o:p></span></p><p style='background:white'><span style='font-size:10.0pt;font-family:"Arial","sans-serif";color:black'>Ana.<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p></div></body></html>