[Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored

[Demikhovsky, Elena]

I checked GCC. It passes parameters in XMM when SSE2 is enabled.
I checked Intel processors in Wikipedia and understood that SSE1-only processor did not support 64-bit OS.

Craig, I don't think that you should do so deep analysis of Intel history. Just put hasSSE2() and nobody will complain.

-           Elena

From: Nadav Rotem [mailto:nrotem at apple.com]
Sent: Wednesday, October 16, 2013 20:00
To: Craig Topper
Cc: Demikhovsky, Elena; llvm-commits at cs.uiuc.edu
Subject: Re: [Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored

I guess that there are not too many SSE1 users out there any more  :)

On Oct 16, 2013, at 9:57 AM, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote:


Looks like gcc 4.8.1 uses xmm for doubles if only sse1 is enabled. Curiously it still issues a movsd instruction which is sse2...

On Wed, Oct 16, 2013 at 9:31 AM, Nadav Rotem <nrotem at apple.com<mailto:nrotem at apple.com>> wrote:
I am not sure.  Do we know what GCC and ICC do?  According to this[1] on x86-32bit floats are passed on ST0.

[1] - https://developer.apple.com/library/mac/documentation/developertools/conceptual/LowLevelABI/130-IA-32_Function_Calling_Conventions/IA32.html

On Oct 16, 2013, at 7:54 AM, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote:


Nadav, what do you think?

On Thu, Oct 10, 2013 at 6:14 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com<mailto:elena.demikhovsky at intel.com>> wrote:
FP passed in XMM starting from SSE2.

Intel SSE processor did not support 64-bit mode and all parameters were in FP stack (X87) registers.

-           Elena

From: llvm-commits-bounces at cs.uiuc.edu<mailto:llvm-commits-bounces at cs.uiuc.edu> [mailto:llvm-commits-bounces at cs.uiuc.edu<mailto:llvm-commits-bounces at cs.uiuc.edu>] On Behalf Of Craig Topper
Sent: Thursday, October 10, 2013 07:00
To: llvm-commits at cs.uiuc.edu<mailto:llvm-commits at cs.uiuc.edu>
Subject: [Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored

Not sure if this is actually the right thing to do, but it fixes an issue on llvm-dev where XMM->FP copy was being created.

This patches makes integer vector types and f64 only pass in xmm if sse2 is enabled which is when these types are assigned to the xmm class.

--
~Craig

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~Craig




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~Craig

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