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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I checked GCC. It passes parameters in XMM when SSE2 is enabled.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I checked Intel processors in Wikipedia and understood that SSE1-only processor did not support 64-bit OS.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Craig, I don’t think that you should do so deep analysis of Intel history. Just put hasSSE2() and nobody will complain.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<![if !supportLists]><span style="font-family:"Calibri","sans-serif";color:#31849B"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><b><i><span style="color:#31849B"> Elena<o:p></o:p></span></i></b></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Nadav Rotem [mailto:nrotem@apple.com]
<br>
<b>Sent:</b> Wednesday, October 16, 2013 20:00<br>
<b>To:</b> Craig Topper<br>
<b>Cc:</b> Demikhovsky, Elena; llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored<o:p></o:p></span></p>
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<p class="MsoNormal">I guess that there are not too many SSE1 users out there any more :) <o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Oct 16, 2013, at 9:57 AM, Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Looks like gcc 4.8.1 uses xmm for doubles if only sse1 is enabled. Curiously it still issues a movsd instruction which is sse2...<o:p></o:p></p>
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<p class="MsoNormal">On Wed, Oct 16, 2013 at 9:31 AM, Nadav Rotem <<a href="mailto:nrotem@apple.com" target="_blank">nrotem@apple.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">I am not sure. Do we know what GCC and ICC do? According to this[1] on x86-32bit floats are passed on ST0. <o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">[1] - <a href="https://developer.apple.com/library/mac/documentation/developertools/conceptual/LowLevelABI/130-IA-32_Function_Calling_Conventions/IA32.html" target="_blank">
https://developer.apple.com/library/mac/documentation/developertools/conceptual/LowLevelABI/130-IA-32_Function_Calling_Conventions/IA32.html</a><o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Oct 16, 2013, at 7:54 AM, Craig Topper <<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Nadav, what do you think?<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><o:p> </o:p></p>
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<p class="MsoNormal">On Thu, Oct 10, 2013 at 6:14 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com" target="_blank">elena.demikhovsky@intel.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">FP passed in XMM starting from SSE2.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Intel SSE processor did not support 64-bit mode and all parameters were in FP stack (X87) registers.</span><o:p></o:p></p>
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<span style="font-family:"Calibri","sans-serif";color:#31849B">-</span><span style="font-size:7.0pt;color:#31849B">
</span><b><i><span style="color:#31849B"> Elena</span></i></b><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">
<a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a> [mailto:<a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a>]
<b>On Behalf Of </b>Craig Topper<br>
<b>Sent:</b> Thursday, October 10, 2013 07:00<br>
<b>To:</b> <a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<b>Subject:</b> [Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored</span><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">Not sure if this is actually the right thing to do, but it fixes an issue on llvm-dev where XMM->FP copy was being created.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">This patches makes integer vector types and f64 only pass in xmm if sse2 is enabled which is when these types are assigned to the xmm class.<br clear="all">
<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">--
<br>
~Craig <o:p></o:p></p>
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<p>---------------------------------------------------------------------<br>
Intel Israel (74) Limited<o:p></o:p></p>
<p>This e-mail and any attachments may contain confidential material for<br>
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<p class="MsoNormal"><span class="hoenzb"><span style="color:#888888">-- </span></span><span style="color:#888888"><br>
<span class="hoenzb">~Craig </span></span><o:p></o:p></p>
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<p class="MsoNormal">-- <br>
~Craig <o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p>---------------------------------------------------------------------<br>
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<p>This e-mail and any attachments may contain confidential material for<br>
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