[PATCH] [AArch64] Add Register Operand to constrain registers to V0-V15 range
t.p.northover at gmail.com
Wed Sep 25 23:59:44 PDT 2013
> But I implemented it differently, I used RegisterOperand class instead.
I don't think that's going to have any effect on CodeGen. The register
allocator isn't going to know anything about the AsmOperand
constraints and will still select any register it likes from FPR128.
Jiangning's patch looks like pretty much what I'd expect in this area.
(I'll look at the rest of it today, by the way Jiangning).
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