[llvm] r184066 - Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
David Blaikie
dblaikie at gmail.com
Mon Jun 17 20:18:39 PDT 2013
On Jun 17, 2013 5:58 PM, "Evan Cheng" <evan.cheng at apple.com> wrote:
>
> Are you sure we don't use any debug info fidelity due to this change?
As sure as I can be with the testing I have available to me. Including the
apple gdb 4.2 suite and Linux gdb 7.5 tests.
>
> Thanks,
>
> Evan
>
> On Jun 16, 2013, at 1:34 PM, David Blaikie <dblaikie at gmail.com> wrote:
>
> > Author: dblaikie
> > Date: Sun Jun 16 15:34:15 2013
> > New Revision: 184066
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=184066&view=rev
> > Log:
> > Debug Info: Simplify Frame Index handling in DBG_VALUE Machine
Instructions
> >
> > Rather than using the full power of target-specific addressing modes in
> > DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
> > reduces the complexity of debug info handling down to two
> > representations of values (reg+offset and frame index+offset) rather
> > than three or four.
> >
> > Ideally we could ensure that frame indicies had been eliminated by the
> > time we reached an assembly or dwarf generation, but I haven't spent the
> > time to figure out where the FIs are leaking through into that & whether
> > there's a good place to convert them. Some FI+offset=>reg+offset
> > conversion is done (see PrologEpilogInserter, for example) which is
> > necessary for some SelectionDAG assumptions about registers, I believe,
> > but it might be possible to make this a more thorough conversion &
> > ensure there are no remaining FIs no matter how instruction selection
> > is performed.
> >
> > Modified:
> > llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> > llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
> > llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> > llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> > llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
> > llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
> > llvm/trunk/lib/CodeGen/RegAllocFast.cpp
> > llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
> > llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
> > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> > llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> > llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
> > llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll
> > llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll
> >
> > Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Sun Jun 16
15:34:15 2013
> > @@ -42,6 +42,7 @@
> > #include "llvm/Support/MathExtras.h"
> > #include "llvm/Support/Timer.h"
> > #include "llvm/Target/Mangler.h"
> > +#include "llvm/Target/TargetFrameLowering.h"
> > #include "llvm/Target/TargetInstrInfo.h"
> > #include "llvm/Target/TargetLowering.h"
> > #include "llvm/Target/TargetLoweringObjectFile.h"
> > @@ -591,8 +592,17 @@ static bool emitDebugValueComment(const
> > } else if (MI->getOperand(0).isCImm()) {
> > MI->getOperand(0).getCImm()->getValue().print(OS, false
/*isSigned*/);
> > } else {
> > - assert(MI->getOperand(0).isReg() && "Unknown operand type");
> > - unsigned Reg = MI->getOperand(0).getReg();
> > + unsigned Reg;
> > + if (MI->getOperand(0).isReg()) {
> > + Reg = MI->getOperand(0).getReg();
> > + Deref = Offset != 0; // FIXME: use a better sentinel value so
that deref
> > + // of a reg with a zero offset is valid
> > + } else {
> > + assert(MI->getOperand(0).isFI() && "Unknown operand type");
> > + const TargetFrameLowering *TFI = AP.TM.getFrameLowering();
> > + Offset += TFI->getFrameIndexReference(*AP.MF,
MI->getOperand(0).getIndex(), Reg);
> > + Deref = true;
> > + }
> > if (Reg == 0) {
> > // Suppress offset, it is not meaningful here.
> > OS << "undef";
> > @@ -600,8 +610,6 @@ static bool emitDebugValueComment(const
> > AP.OutStreamer.EmitRawText(OS.str());
> > return true;
> > }
> > - Deref = Offset != 0; // FIXME: use a better sentinel value so that
deref of
> > - // a reg with a zero offset is valid
> > if (Deref)
> > OS << '[';
> > OS << AP.TM.getRegisterInfo()->getName(Reg);
> >
> > Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp Sun Jun 16
15:34:15 2013
> > @@ -1525,43 +1525,23 @@ DIE *CompileUnit::constructVariableDIE(D
> > // Check if variable is described by a DBG_VALUE instruction.
> > if (const MachineInstr *DVInsn = DV->getMInsn()) {
> > bool updated = false;
> > - if (DVInsn->getNumOperands() == 3) {
> > - if (DVInsn->getOperand(0).isReg()) {
> > - const MachineOperand RegOp = DVInsn->getOperand(0);
> > - const TargetRegisterInfo *TRI = Asm->TM.getRegisterInfo();
> > - if (DVInsn->getOperand(1).isImm() &&
> > - TRI->getFrameRegister(*Asm->MF) == RegOp.getReg()) {
> > - unsigned FrameReg = 0;
> > - const TargetFrameLowering *TFI = Asm->TM.getFrameLowering();
> > - int Offset =
> > - TFI->getFrameIndexReference(*Asm->MF,
> > - DVInsn->getOperand(1).getImm(),
> > - FrameReg);
> > - MachineLocation Location(FrameReg, Offset);
> > - addVariableAddress(DV, VariableDie, Location);
> > -
> > - } else if (RegOp.getReg())
> > - addVariableAddress(DV, VariableDie,
> > -
MachineLocation(RegOp.getReg()));
> > - updated = true;
> > - }
> > - else if (DVInsn->getOperand(0).isImm())
> > - updated =
> > - addConstantValue(VariableDie, DVInsn->getOperand(0),
> > - DV->getType());
> > - else if (DVInsn->getOperand(0).isFPImm())
> > - updated =
> > - addConstantFPValue(VariableDie, DVInsn->getOperand(0));
> > - else if (DVInsn->getOperand(0).isCImm())
> > - updated =
> > - addConstantValue(VariableDie,
> > - DVInsn->getOperand(0).getCImm(),
> > -
DV->getType().isUnsignedDIType());
> > - } else {
> > - addVariableAddress(DV, VariableDie,
> > -
Asm->getDebugValueLocation(DVInsn));
> > + assert(DVInsn->getNumOperands() == 3);
> > + if (DVInsn->getOperand(0).isReg()) {
> > + const MachineOperand RegOp = DVInsn->getOperand(0);
> > + if (int64_t Offset = DVInsn->getOperand(1).getImm()) {
> > + MachineLocation Location(RegOp.getReg(), Offset);
> > + addVariableAddress(DV, VariableDie, Location);
> > + } else if (RegOp.getReg())
> > + addVariableAddress(DV, VariableDie,
MachineLocation(RegOp.getReg()));
> > updated = true;
> > - }
> > + } else if (DVInsn->getOperand(0).isImm())
> > + updated =
> > + addConstantValue(VariableDie, DVInsn->getOperand(0),
DV->getType());
> > + else if (DVInsn->getOperand(0).isFPImm())
> > + updated = addConstantFPValue(VariableDie, DVInsn->getOperand(0));
> > + else if (DVInsn->getOperand(0).isCImm())
> > + updated = addConstantValue(VariableDie,
DVInsn->getOperand(0).getCImm(),
> > + DV->getType().isUnsignedDIType());
> > if (!updated) {
> > // If variableDie is not updated then DBG_VALUE instruction does
not
> > // have valid variable info.
> >
> > Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Sun Jun 16
15:34:15 2013
> > @@ -1170,10 +1170,7 @@ static DotDebugLocEntry getDebugLocEntry
> > const MachineInstr *MI) {
> > const MDNode *Var = MI->getOperand(MI->getNumOperands() -
1).getMetadata();
> >
> > - if (MI->getNumOperands() != 3) {
> > - MachineLocation MLoc = Asm->getDebugValueLocation(MI);
> > - return DotDebugLocEntry(FLabel, SLabel, MLoc, Var);
> > - }
> > + assert(MI->getNumOperands() == 3);
> > if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) {
> > MachineLocation MLoc;
> > // TODO: Currently an offset of 0 in a DBG_VALUE means
> >
> > Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Sun Jun 16 15:34:15 2013
> > @@ -24,6 +24,7 @@
> > #include "llvm/CodeGen/MachineDominators.h"
> > #include "llvm/CodeGen/MachineFrameInfo.h"
> > #include "llvm/CodeGen/MachineFunction.h"
> > +#include "llvm/CodeGen/MachineInstrBuilder.h"
> > #include "llvm/CodeGen/MachineInstrBundle.h"
> > #include "llvm/CodeGen/MachineLoopInfo.h"
> > #include "llvm/CodeGen/MachineRegisterInfo.h"
> > @@ -1123,15 +1124,10 @@ void InlineSpiller::spillAroundUses(unsi
> > uint64_t Offset = MI->getOperand(1).getImm();
> > const MDNode *MDPtr = MI->getOperand(2).getMetadata();
> > DebugLoc DL = MI->getDebugLoc();
> > - if (MachineInstr *NewDV = TII.emitFrameIndexDebugValue(MF,
StackSlot,
> > - Offset,
MDPtr, DL)) {
> > - DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t"
<< *MI);
> > - MachineBasicBlock *MBB = MI->getParent();
> > - MBB->insert(MBB->erase(MI), NewDV);
> > - } else {
> > - DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" <<
*MI);
> > - MI->eraseFromParent();
> > - }
> > + DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" <<
*MI);
> > + MachineBasicBlock *MBB = MI->getParent();
> > + BuildMI(*MBB, MBB->erase(MI), DL,
TII.get(TargetOpcode::DBG_VALUE))
> > + .addFrameIndex(StackSlot).addImm(Offset).addMetadata(MDPtr);
> > continue;
> > }
> >
> >
> > Modified: llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp Sun Jun 16 15:34:15
2013
> > @@ -921,17 +921,6 @@ void UserValue::insertDebugValue(Machine
> > MachineOperand &Loc = locations[LocNo];
> > ++NumInsertedDebugValues;
> >
> > - // Frame index locations may require a target callback.
> > - if (Loc.isFI()) {
> > - MachineInstr *MI = TII.emitFrameIndexDebugValue(*MBB->getParent(),
> > - Loc.getIndex(), offset,
variable,
> > - findDebugLoc());
> > - if (MI) {
> > - MBB->insert(I, MI);
> > - return;
> > - }
> > - }
> > - // This is not a frame index, or the target is happy with a standard
FI.
> > BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
> > .addOperand(Loc).addImm(offset).addMetadata(variable);
> > }
> > @@ -992,4 +981,3 @@ void LiveDebugVariables::dump() {
> > static_cast<LDVImpl*>(pImpl)->print(dbgs());
> > }
> > #endif
> > -
> >
> > Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Sun Jun 16 15:34:15
2013
> > @@ -777,7 +777,22 @@ void PEI::replaceFrameIndices(MachineFun
> > bool DoIncr = true;
> > for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> > if (!MI->getOperand(i).isFI())
> > - continue;
> > + continue;
> > +
> > + // Frame indicies in debug values are encoded in a target
independent
> > + // way with simply the frame index and offset rather than any
> > + // target-specific addressing mode.
> > + if (MI->isDebugValue()) {
> > + assert(i == 0 && "Frame indicies can only appear as the
first "
> > + "operand of a DBG_VALUE machine
instruction");
> > + unsigned Reg;
> > + MachineOperand &Offset = MI->getOperand(1);
> > + Offset.setImm(Offset.getImm() +
> > + TFI->getFrameIndexReference(
> > + Fn, MI->getOperand(0).getIndex(), Reg));
> > + MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
> > + continue;
> > + }
> >
> > // Some instructions (e.g. inline asm instructions) can have
> > // multiple frame indices and/or cause eliminateFrameIndex
> >
> > Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Sun Jun 16 15:34:15 2013
> > @@ -297,25 +297,21 @@ void RAFast::spillVirtReg(MachineBasicBl
> > LiveDbgValueMap[LRI->VirtReg];
> > for (unsigned li = 0, le = LRIDbgValues.size(); li != le; ++li) {
> > MachineInstr *DBG = LRIDbgValues[li];
> > - const MDNode *MDPtr =
> > - DBG->getOperand(DBG->getNumOperands()-1).getMetadata();
> > - int64_t Offset = 0;
> > - if (DBG->getOperand(1).isImm())
> > - Offset = DBG->getOperand(1).getImm();
> > + const MDNode *MDPtr = DBG->getOperand(2).getMetadata();
> > + int64_t Offset = DBG->getOperand(1).getImm();
> > DebugLoc DL;
> > if (MI == MBB->end()) {
> > // If MI is at basic block end then use last instruction's
location.
> > MachineBasicBlock::iterator EI = MI;
> > DL = (--EI)->getDebugLoc();
> > - }
> > - else
> > + } else
> > DL = MI->getDebugLoc();
> > - if (MachineInstr *NewDV =
> > - TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
> > - MachineBasicBlock *MBB = DBG->getParent();
> > - MBB->insert(MI, NewDV);
> > - DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n"
<< *NewDV);
> > - }
> > + MachineBasicBlock *MBB = DBG->getParent();
> > + MachineInstr *NewDV =
> > + BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE))
> > + .addFrameIndex(FI).addImm(Offset).addMetadata(MDPtr);
> > + (void)NewDV;
> > + DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" <<
*NewDV);
> > }
> > // Now this register is spilled there is should not be any DBG_VALUE
> > // pointing to this register because they are all pointing to
spilled value
> > @@ -863,21 +859,16 @@ void RAFast::AllocateBasicBlock() {
> > const MDNode *MDPtr =
> > MI->getOperand(MI->getNumOperands()-1).getMetadata();
> > DebugLoc DL = MI->getDebugLoc();
> > - if (MachineInstr *NewDV =
> > - TII->emitFrameIndexDebugValue(*MF, SS, Offset,
MDPtr, DL)) {
> > - DEBUG(dbgs() << "Modifying debug info due to spill:" <<
> > - "\t" << *MI);
> > - MachineBasicBlock *MBB = MI->getParent();
> > - MBB->insert(MBB->erase(MI), NewDV);
> > - // Scan NewDV operands from the beginning.
> > - MI = NewDV;
> > - ScanDbgValue = true;
> > - break;
> > - } else {
> > - // We can't allocate a physreg for a DebugValue; sorry!
> > - DEBUG(dbgs() << "Unable to allocate vreg used by
DBG_VALUE");
> > - MO.setReg(0);
> > - }
> > + MachineBasicBlock *MBB = MI->getParent();
> > + MachineInstr *NewDV = BuildMI(*MBB, MBB->erase(MI), DL,
> > +
TII->get(TargetOpcode::DBG_VALUE))
> > + .addFrameIndex(SS).addImm(Offset).addMetadata(MDPtr);
> > + DEBUG(dbgs() << "Modifying debug info due to spill:"
> > + << "\t" << *NewDV);
> > + // Scan NewDV operands from the beginning.
> > + MI = NewDV;
> > + ScanDbgValue = true;
> > + break;
> > }
> > }
> > LiveDbgValueMap[Reg].push_back(MI);
> >
> > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Sun Jun 16
15:34:15 2013
> > @@ -41,6 +41,7 @@
> >
> > #define DEBUG_TYPE "isel"
> > #include "llvm/CodeGen/FastISel.h"
> > +#include "llvm/ADT/Optional.h"
> > #include "llvm/ADT/Statistic.h"
> > #include "llvm/Analysis/Loads.h"
> > #include "llvm/CodeGen/Analysis.h"
> > @@ -613,16 +614,14 @@ bool FastISel::SelectCall(const User *I)
> > return true;
> > }
> >
> > - unsigned Reg = 0;
> > - unsigned Offset = 0;
> > - if (const Argument *Arg = dyn_cast<Argument>(Address)) {
> > + Optional<MachineOperand> Op;
> > + if (const Argument *Arg = dyn_cast<Argument>(Address))
> > // Some arguments' frame index is recorded during argument
lowering.
> > - Offset = FuncInfo.getArgumentFrameIndex(Arg);
> > - if (Offset)
> > - Reg = TRI.getFrameRegister(*FuncInfo.MF);
> > - }
> > - if (!Reg)
> > - Reg = lookUpRegForValue(Address);
> > + if (int FI = FuncInfo.getArgumentFrameIndex(Arg))
> > + Op = MachineOperand::CreateFI(FI);
> > + if (!Op)
> > + if (unsigned Reg = lookUpRegForValue(Address))
> > + Op = MachineOperand::CreateReg(Reg, false);
> >
> > // If we have a VLA that has a "use" in a metadata node that's then
used
> > // here but it has no other uses, then we have a problem. E.g.,
> > @@ -635,16 +634,19 @@ bool FastISel::SelectCall(const User *I)
> > // If we assign 'a' a vreg and fast isel later on has to use the
selection
> > // DAG isel, it will want to copy the value to the vreg. However,
there are
> > // no uses, which goes counter to what selection DAG isel expects.
> > - if (!Reg && !Address->use_empty() && isa<Instruction>(Address) &&
> > + if (!Op && !Address->use_empty() && isa<Instruction>(Address) &&
> > (!isa<AllocaInst>(Address) ||
> > !FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(Address))))
> > - Reg = FuncInfo.InitializeRegForValue(Address);
> > + Op =
MachineOperand::CreateReg(FuncInfo.InitializeRegForValue(Address),
> > + false);
> > +
> > + if (Op && Op->isReg())
> > + Op->setIsDebug(true);
> >
> > - if (Reg)
> > + if (Op)
> > BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
> > - TII.get(TargetOpcode::DBG_VALUE))
> > - .addReg(Reg, RegState::Debug).addImm(Offset)
> > - .addMetadata(DI->getVariable());
> > +
TII.get(TargetOpcode::DBG_VALUE)).addOperand(*Op).addImm(0)
> > + .addMetadata(DI->getVariable());
> > else
> > // We can't yet handle anything else here because it would require
> > // generating code, thus altering codegen because of debug info.
> >
> > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Sun Jun 16
15:34:15 2013
> > @@ -639,8 +639,8 @@ InstrEmitter::EmitDbgValue(SDDbgValue *S
> > if (SD->getKind() == SDDbgValue::FRAMEIX) {
> > // Stack address; this needs to be lowered in target-dependent
fashion.
> > // EmitTargetCodeForFrameDebugValue is responsible for allocation.
> > - unsigned FrameIx = SD->getFrameIx();
> > - return TII->emitFrameIndexDebugValue(*MF, FrameIx, Offset, MDPtr,
DL);
> > + return BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE))
> > +
.addFrameIndex(SD->getFrameIx()).addImm(Offset).addMetadata(MDPtr);
> > }
> > // Otherwise, we're going to create an instruction here.
> > const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
> >
> > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
(original)
> > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sun Jun
16 15:34:15 2013
> > @@ -15,6 +15,7 @@
> > #include "SelectionDAGBuilder.h"
> > #include "SDNodeDbgValue.h"
> > #include "llvm/ADT/BitVector.h"
> > +#include "llvm/ADT/Optional.h"
> > #include "llvm/ADT/SmallSet.h"
> > #include "llvm/Analysis/AliasAnalysis.h"
> > #include "llvm/Analysis/BranchProbabilityInfo.h"
> > @@ -4349,20 +4350,19 @@ SelectionDAGBuilder::EmitFuncArgumentDbg
> >
> > MachineFunction &MF = DAG.getMachineFunction();
> > const TargetInstrInfo *TII = DAG.getTarget().getInstrInfo();
> > - const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo();
> >
> > // Ignore inlined function arguments here.
> > DIVariable DV(Variable);
> > if (DV.isInlinedFnArgument(MF.getFunction()))
> > return false;
> >
> > - unsigned Reg = 0;
> > + Optional<MachineOperand> Op;
> > // Some arguments' frame index is recorded during argument lowering.
> > - Offset = FuncInfo.getArgumentFrameIndex(Arg);
> > - if (Offset)
> > - Reg = TRI->getFrameRegister(MF);
> > + if (int FI = FuncInfo.getArgumentFrameIndex(Arg))
> > + Op = MachineOperand::CreateFI(FI);
> >
> > - if (!Reg && N.getNode()) {
> > + if (!Op && N.getNode()) {
> > + unsigned Reg;
> > if (N.getOpcode() == ISD::CopyFromReg)
> > Reg = cast<RegisterSDNode>(N.getOperand(1))->getReg();
> > else
> > @@ -4373,32 +4373,33 @@ SelectionDAGBuilder::EmitFuncArgumentDbg
> > if (PR)
> > Reg = PR;
> > }
> > + if (Reg)
> > + Op = MachineOperand::CreateReg(Reg, false);
> > }
> >
> > - if (!Reg) {
> > + if (!Op) {
> > // Check if ValueMap has reg number.
> > DenseMap<const Value *, unsigned>::iterator VMI =
FuncInfo.ValueMap.find(V);
> > if (VMI != FuncInfo.ValueMap.end())
> > - Reg = VMI->second;
> > + Op = MachineOperand::CreateReg(VMI->second, false);
> > }
> >
> > - if (!Reg && N.getNode()) {
> > + if (!Op && N.getNode())
> > // Check if frame index is available.
> > if (LoadSDNode *LNode = dyn_cast<LoadSDNode>(N.getNode()))
> > if (FrameIndexSDNode *FINode =
> > - dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode())) {
> > - Reg = TRI->getFrameRegister(MF);
> > - Offset = FINode->getIndex();
> > - }
> > - }
> > + dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode()))
> > + Op = MachineOperand::CreateFI(FINode->getIndex());
> >
> > - if (!Reg)
> > + if (!Op)
> > return false;
> >
> > - MachineInstrBuilder MIB = BuildMI(MF, getCurDebugLoc(),
> > - TII->get(TargetOpcode::DBG_VALUE))
> > - .addReg(Reg, RegState::Debug).addImm(Offset).addMetadata(Variable);
> > - FuncInfo.ArgDbgValues.push_back(&*MIB);
> > + if (Op->isReg())
> > + Op->setIsDebug();
> > +
> > + FuncInfo.ArgDbgValues.push_back(
> > + BuildMI(MF, getCurDebugLoc(), TII->get(TargetOpcode::DBG_VALUE))
> > + .addOperand(*Op).addImm(Offset).addMetadata(Variable));
> > return true;
> > }
> >
> >
> > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
> > +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Jun 16
15:34:15 2013
> > @@ -401,7 +401,8 @@ bool SelectionDAGISel::runOnMachineFunct
> > // Insert DBG_VALUE instructions for function arguments to the entry
block.
> > for (unsigned i = 0, e = FuncInfo->ArgDbgValues.size(); i != e; ++i) {
> > MachineInstr *MI = FuncInfo->ArgDbgValues[e-i-1];
> > - unsigned Reg = MI->getOperand(0).getReg();
> > + bool hasFI = MI->getOperand(0).isFI();
> > + unsigned Reg = hasFI ? TRI.getFrameRegister(*MF) :
MI->getOperand(0).getReg();
> > if (TargetRegisterInfo::isPhysicalRegister(Reg))
> > EntryMBB->insert(EntryMBB->begin(), MI);
> > else {
> > @@ -414,6 +415,8 @@ bool SelectionDAGISel::runOnMachineFunct
> > // If Reg is live-in then update debug info to track its copy in a
vreg.
> > DenseMap<unsigned, unsigned>::iterator LDI = LiveInMap.find(Reg);
> > if (LDI != LiveInMap.end()) {
> > + assert(!hasFI && "There's no handling of frame pointer updating
here yet "
> > + "- add if needed");
> > MachineInstr *Def = RegInfo->getVRegDef(LDI->second);
> > MachineBasicBlock::iterator InsertPos = Def;
> > const MDNode *Variable =
> >
> > Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
> > +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Sun Jun 16
15:34:15 2013
> > @@ -702,12 +702,7 @@ ARMBaseRegisterInfo::eliminateFrameIndex
> > }
> > #endif // NDEBUG
> >
> > - // Special handling of dbg_value instructions.
> > - if (MI.isDebugValue()) {
> > - MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false
/*isDef*/);
> > - MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
> > - return;
> > - }
> > + assert(!MI.isDebugValue() && "DBG_VALUEs should be handled in
target-independent code");
> >
> > // Modify MI as necessary to handle as much of 'Offset' as possible
> > bool Done = false;
> >
> > Modified: llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll (original)
> > +++ llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll Sun Jun 16 15:34:15
2013
> > @@ -11,7 +11,7 @@ define void @foo(%struct.tag_s* nocaptur
> > tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0,
metadata !13), !dbg !21
> > tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata
!14), !dbg !22
> > tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata
!17), !dbg !23
> > -;CHECK: @DEBUG_VALUE: foo:y <- [R7+4294967295]
> > +;CHECK: @DEBUG_VALUE: foo:y <- [R7+8]
> > tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64
0, metadata !18), !dbg !24
> > tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64
0, metadata !19), !dbg !25
> > %1 = icmp eq %struct.tag_s* %c, null, !dbg !26
> >
> > Modified: llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll
> > URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll?rev=184066&r1=184065&r2=184066&view=diff
> >
==============================================================================
> > --- llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll (original)
> > +++ llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll Sun Jun 16
15:34:15 2013
> > @@ -1,5 +1,5 @@
> > ; RUN: llc -O0 < %s | FileCheck %s
> > -; CHECK: @DEBUG_VALUE: mydata <- [sp+#{{[0-9]+}}]+#0
> > +; CHECK: @DEBUG_VALUE: mydata <- [SP+{{[0-9]+}}]
> > ; Radar 9331779
> > target datalayout =
"e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
> > target triple = "thumbv7-apple-ios"
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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