Fix for PR14824: Optimization arm_ldst_opt inserts newly generated instruction vldmia at incorrect position

[Jiangning Liu]

Stepan,

Looking at all codes in function ARMLoadStoreOpt::LoadStoreMultipleOpti, I
think the newly added class MemOpsTracker seems to be splitting the change
of MemOps for the 1st half and the 2nd half of this function, which would
make this function hard to be understood.

Why can't we simply add a new method/function to check the register
overlap? For example, simply modify one line of Hao's code

+            if (Reg == It->MBBI->getOperand(0).getReg()) {

to be like,

+            if (RegsAreOverlapped(Reg, It->MBBI->getOperand(0).getReg())) {

Otherwise, I would feel your code change is a little bit over designed.

Also, the function isIntersected looks strange, and why don't
we naturally use a set to help this?

Thanks,
-Jiangning


2013/3/19 Stepan Dyatkovskiy <stpworld at narod.ru>

> ping
>
> Stepan Dyatkovskiy wrote:
>
>> Hello Hao,
>>
>> hao liu wrote:
>>
>>> But I just have one question: do we need to consider about the mix
>>> situation of registers of S, D and Q?  I just wonder the existence of
>>> some
>>> code like:
>>>        S1 = ldr r0, #4;
>>>        D1 = ldr r0, #8;
>>>        Q1 = ldr r0, #16;
>>>        ...
>>>
>>
>> I checked this case.
>> By now, it is possible to get llc emit code like this:
>>          ...
>>          vldr    s4, [r0, #400]
>>          vldr    d16, [r1]
>>          vldr    s0, [r0, #432]
>>          ...
>>
>> I suppose there is case, where D0 is used instead of D16, and then for
>> example S0 and S1 are implicitly reused.
>>
>> In Jiangning's Liu attachment:
>> http://llvm.org/bugs/**attachment.cgi?id=9821<http://llvm.org/bugs/attachment.cgi?id=9821>
>>
>> try to insert code like this (somewhere in middle):
>>
>>    %d_ptr = bitcast <8 x i64> * %source to <8 x double> *
>>    %doubles = getelementptr inbounds <8 x double> * %d_ptr, i32 0, i32 0
>>    %initial_double = load double * %doubles, align 64
>>    %modified_double = fadd double %initial_double, %initial_double
>>    store double %modified_double, double * %doubles
>>
>> It would emit the mix of vldrs and vldrd instructions.
>>
>> I attached modified test case. Try to run it with command:
>> "./llc ldst_opt_bug-q.ll -mcpu=cortex-a9 -mattr=+neon,+neonfp"
>>
>> -Stepan.
>>
>>
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-- 
Thanks,
-Jiangning
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