Prevent visitSIGN_EXTEND from generating ISD::SELECT for vectors

[Nadav Rotem]

LGTM. 

On Mar 12, 2013, at 9:15 AM, "Relph, Richard" <Richard.Relph at amd.com> wrote:

> Per discussion on LLVMDev, implement Nadav's suggested fix to DAGCombiner::visitSIGN_EXTEND() to prevent 'optimization' of SIGN_EXTEND to SELECT if we are sign-extending a vector…
> 
> Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp	(revision 176837)
> +++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp	(working copy)
> @@ -4496,8 +4496,8 @@
>                        NegOne, DAG.getConstant(0, VT),
>                        cast<CondCodeSDNode>(N0.getOperand(2))->get(), true);
>     if (SCC.getNode()) return SCC;
> -    if (!LegalOperations ||
> -        TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(VT)))
> +    if (!VT.isVector() && (!LegalOperations ||
> +        TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(VT))))
>       return DAG.getNode(ISD::SELECT, N->getDebugLoc(), VT,
>                          DAG.getSetCC(N->getDebugLoc(),
>                                       TLI.getSetCCResultType(VT),
> 
> 
> 
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